Updating API
This commit is contained in:
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bdd3322dcb
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fc81c8b5d8
2
Cargo.lock
generated
2
Cargo.lock
generated
@ -517,7 +517,7 @@ dependencies = [
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[[package]]
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name = "stm32h7xx-hal"
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version = "0.8.0"
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source = "git+https://github.com/stm32-rs/stm32h7xx-hal?branch=dma#0bfeeca4ce120c1b7c6d140a7da73a4372b874d8"
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source = "git+https://github.com/quartiq/stm32h7xx-hal?branch=feature/number-of-transfers#e70a78788e74be5281321213b53e8cd1d213550e"
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dependencies = [
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"bare-metal 1.0.0",
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"cast",
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@ -53,8 +53,8 @@ default-features = false
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[dependencies.stm32h7xx-hal]
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features = ["stm32h743v", "rt", "unproven", "ethernet", "quadspi"]
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git = "https://github.com/stm32-rs/stm32h7xx-hal"
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branch = "dma"
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git = "https://github.com/quartiq/stm32h7xx-hal"
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branch = "feature/number-of-transfers"
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[features]
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semihosting = ["panic-semihosting", "cortex-m-log/semihosting"]
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@ -195,7 +195,7 @@ macro_rules! adc_input {
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// Start the next transfer.
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self.transfer.clear_interrupts();
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let (prev_buffer, _) =
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let (prev_buffer, _, _) =
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self.transfer.next_transfer(next_buffer).unwrap();
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self.next_buffer.replace(prev_buffer); // .unwrap_none() https://github.com/rust-lang/rust/issues/62633
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@ -143,7 +143,7 @@ macro_rules! dac_output {
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// Start the next transfer.
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self.transfer.clear_interrupts();
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let (prev_buffer, _) =
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let (prev_buffer, _, _) =
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self.transfer.next_transfer(next_buffer).unwrap();
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// .unwrap_none() https://github.com/rust-lang/rust/issues/62633
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@ -13,8 +13,8 @@ pub struct InputStamper {
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timestamp_buffer: heapless::Vec<u16, heapless::consts::U128>,
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next_buffer: Option<&'static mut [u16; INPUT_BUFFER_SIZE]>,
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transfer: Transfer<
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hal::dma::dma::Stream4<hal::stm32::DMA1>,
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sampling_timer::Timer2Channel4,
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hal::dma::dma::Stream6<hal::stm32::DMA1>,
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sampling_timer::tim2::Channel4InputCapture,
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PeripheralToMemory,
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&'static mut [u16; INPUT_BUFFER_SIZE],
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>,
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@ -23,13 +23,13 @@ pub struct InputStamper {
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impl InputStamper {
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pub fn new(
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trigger: hal::gpio::gpioa::PA3<hal::gpio::Alternate<hal::gpio::AF1>>,
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stream: hal::dma::dma::Stream4<hal::stm32::DMA1>,
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timer_channel: sampling_timer::Timer2Channel4,
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stream: hal::dma::dma::Stream6<hal::stm32::DMA1>,
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timer_channel: sampling_timer::tim2::Channel4,
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) -> Self {
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// Utilize the TIM2 CH4 as an input capture channel - use TI4 (the DI0 input trigger) as the
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// capture source.
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timer_channel.listen_dma();
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timer_channel.to_input_capture(sampling_timer::CC4S_A::TI4);
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let input_capture = timer_channel.to_input_capture(sampling_timer::tim2::CC4S_A::TI4);
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// Set up the DMA transfer.
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let dma_config = DmaConfig::default()
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@ -39,7 +39,7 @@ impl InputStamper {
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let mut timestamp_transfer: Transfer<_, _, PeripheralToMemory, _> =
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Transfer::init(
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stream,
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timer_channel,
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input_capture,
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unsafe { &mut BUF0 },
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None,
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dma_config,
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93
src/main.rs
93
src/main.rs
@ -70,9 +70,7 @@ mod adc;
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mod afe;
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mod dac;
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mod digital_input_stamper;
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mod eeprom;
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mod hrtimer;
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mod iir;
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mod design_parameters;
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mod eeprom;
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mod pounder;
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@ -775,7 +773,7 @@ const APP: () = {
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let trigger = gpioa.pa3.into_alternate_af1();
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digital_input_stamper::InputStamper::new(
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trigger,
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dma_streams.4,
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dma_streams.6,
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sampling_timer_channels.ch4,
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)
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};
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@ -796,14 +794,12 @@ const APP: () = {
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net_interface: network_interface,
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eth_mac,
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mac_addr,
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profiles: heapless::spsc::Queue::new(),
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}
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}
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#[task(binds=DMA1_STR4, resources=[input_stamper], priority = 2)]
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#[task(binds=DMA1_STR6, resources=[input_stamper], priority = 2)]
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fn digital_stamper(c: digital_stamper::Context) {
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let _timestamps = c.resources.input_stamper.transfer_complete_handler();
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panic!("Timestamp overflow")
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}
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#[task(binds=DMA1_STR3, resources=[adcs, dacs, iir_state, iir_ch], priority=2)]
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@ -911,44 +907,7 @@ const APP: () = {
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Ok::<server::Status, ()>(state)
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}),
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"stabilizer/afe0/gain": (|| c.resources.afes.0.get_gain()),
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"stabilizer/afe1/gain": (|| c.resources.afes.1.get_gain()),
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"pounder/in0": (|| {
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match c.resources.pounder {
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Some(pounder) =>
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pounder.get_input_channel_state(pounder::Channel::In0),
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_ => Err(pounder::Error::Access),
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}
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}),
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"pounder/in1": (|| {
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match c.resources.pounder {
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Some(pounder) =>
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pounder.get_input_channel_state(pounder::Channel::In1),
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_ => Err(pounder::Error::Access),
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}
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}),
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"pounder/out0": (|| {
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match c.resources.pounder {
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Some(pounder) =>
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pounder.get_output_channel_state(pounder::Channel::Out0),
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_ => Err(pounder::Error::Access),
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}
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}),
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"pounder/out1": (|| {
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match c.resources.pounder {
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Some(pounder) =>
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pounder.get_output_channel_state(pounder::Channel::Out1),
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_ => Err(pounder::Error::Access),
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}
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}),
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>>>>>>> master
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"pounder/dds/clock": (|| {
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c.resources.pounder.lock(|pounder| {
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match pounder {
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Some(pounder) => pounder.get_dds_clock_config(),
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_ => Err(pounder::Error::Access),
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}
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})
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})
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"stabilizer/afe1/gain": (|| c.resources.afes.1.get_gain())
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],
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modifiable_attributes: [
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@ -996,50 +955,6 @@ const APP: () = {
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Ok::<server::IirRequest, ()>(req)
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})
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}),
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"pounder/in0": pounder::ChannelState, (|state| {
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c.resources.pounder.lock(|pounder| {
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match pounder {
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Some(pounder) =>
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pounder.set_channel_state(pounder::Channel::In0, state),
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_ => Err(pounder::Error::Access),
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}
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})
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}),
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"pounder/in1": pounder::ChannelState, (|state| {
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c.resources.pounder.lock(|pounder| {
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match pounder {
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Some(pounder) =>
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pounder.set_channel_state(pounder::Channel::In1, state),
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_ => Err(pounder::Error::Access),
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}
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})
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}),
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"pounder/out0": pounder::ChannelState, (|state| {
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c.resources.pounder.lock(|pounder| {
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match pounder {
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Some(pounder) =>
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pounder.set_channel_state(pounder::Channel::Out0, state),
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_ => Err(pounder::Error::Access),
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}
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})
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}),
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"pounder/out1": pounder::ChannelState, (|state| {
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c.resources.pounder.lock(|pounder| {
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match pounder {
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Some(pounder) =>
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pounder.set_channel_state(pounder::Channel::Out1, state),
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_ => Err(pounder::Error::Access),
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}
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})
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}),
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"pounder/dds/clock": pounder::DdsClockConfig, (|config| {
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c.resources.pounder.lock(|pounder| {
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match pounder {
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Some(pounder) => pounder.configure_dds_clock(config),
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_ => Err(pounder::Error::Access),
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}
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})
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}),
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"stabilizer/afe0/gain": afe::Gain, (|gain| {
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c.resources.afes.0.set_gain(gain);
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Ok::<(), ()>(())
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@ -1,6 +1,5 @@
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///! The sampling timer is used for managing ADC sampling and external reference timestamping.
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use super::hal;
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pub use hal::stm32::tim2::ccmr2_input::CC4S_A;
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/// The timer used for managing ADC sampling.
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pub struct SamplingTimer {
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@ -36,12 +35,54 @@ impl SamplingTimer {
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}
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}
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macro_rules! timer_channel {
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($name:ident, $TY:ty, ($ccxde:expr, $ccrx:expr, $ccmrx_output:expr, $ccxs:expr)) => {
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pub struct $name {}
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macro_rules! timer_channels {
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($TY:ty) => {
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paste::paste! {
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impl $name {
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pub mod [< $TY:lower >] {
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pub use hal::stm32::[< $TY:lower >]::ccmr1_input::{CC1S_A, CC2S_A};
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pub use hal::stm32::[< $TY:lower >]::ccmr2_input::{CC3S_A, CC4S_A};
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use stm32h7xx_hal as hal;
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use hal::dma::{traits::TargetAddress, PeripheralToMemory, dma::DMAReq};
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use hal::stm32::TIM2;
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/// The channels representing the timer.
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pub struct Channels {
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pub ch1: Channel1,
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pub ch2: Channel2,
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pub ch3: Channel3,
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pub ch4: Channel4,
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}
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impl Channels {
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/// Construct a new set of channels.
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///
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/// Note(unsafe): This is only safe to call once.
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pub unsafe fn new() -> Self {
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Self {
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ch1: Channel1::new(),
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ch2: Channel2::new(),
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ch3: Channel3::new(),
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ch4: Channel4::new(),
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}
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}
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}
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timer_channels!(1, $TY, ccmr1);
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timer_channels!(2, $TY, ccmr1);
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timer_channels!(3, $TY, ccmr2);
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timer_channels!(4, $TY, ccmr2);
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}
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}
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};
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($index:expr, $TY:ty, $ccmrx:expr) => {
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paste::paste! {
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pub struct [< Channel $index >] {}
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pub struct [< Channel $index InputCapture>] {}
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impl [< Channel $index >] {
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/// Construct a new timer channel.
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///
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/// Note(unsafe): This function must only be called once. Once constructed, the
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@ -50,71 +91,48 @@ macro_rules! timer_channel {
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Self {}
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}
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/// Allow CH4 to generate DMA requests.
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/// Allow the channel to generate DMA requests.
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pub fn listen_dma(&self) {
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let regs = unsafe { &*<$TY>::ptr() };
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regs.dier.modify(|_, w| w.[< $ccxde >]().set_bit());
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regs.dier.modify(|_, w| w.[< cc $index de >]().set_bit());
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}
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/// Operate CH2 as an output-compare.
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/// Operate the channel as an output-compare.
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///
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/// # Args
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/// * `value` - The value to compare the sampling timer's counter against.
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pub fn to_output_compare(&self, value: u32) {
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let regs = unsafe { &*<$TY>::ptr() };
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assert!(value <= regs.arr.read().bits());
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regs.[< $ccrx >].write(|w| w.ccr().bits(value));
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regs.[< $ccmrx_output >]()
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.modify(|_, w| unsafe { w.[< $ccxs >]().bits(0) });
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regs.[< ccr $index >].write(|w| w.ccr().bits(value));
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regs.[< $ccmrx _output >]()
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.modify(|_, w| unsafe { w.[< cc $index s >]().bits(0) });
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}
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/// Operate the channel in input-capture mode.
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///
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/// # Args
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/// * `input` - The input source for the input capture event.
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pub fn to_input_capture(self, input: hal::stm32::[<$TY:lower>]::[< $ccmrx _input >]::[< CC $index S_A >]) -> [< Channel $index InputCapture >]{
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let regs = unsafe { &*<$TY>::ptr() };
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regs.[< $ccmrx _input >]().modify(|_, w| w.[< cc $index s>]().variant(input));
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[< Channel $index InputCapture >] {}
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}
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}
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unsafe impl TargetAddress<PeripheralToMemory> for [< Channel $index InputCapture >] {
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type MemSize = u16;
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const REQUEST_LINE: Option<u8> = Some(DMAReq::[< $TY _CH $index >]as u8);
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fn address(&self) -> u32 {
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let regs = unsafe { &*<$TY>::ptr() };
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®s.[<ccr $index >] as *const _ as u32
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}
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}
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}
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};
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}
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pub mod tim2 {
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use stm32h7xx_hal as hal;
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/// The channels representing the timer.
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pub struct Channels {
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pub ch1: Channel1,
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pub ch2: Channel2,
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pub ch3: Channel3,
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pub ch4: Channel4,
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}
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impl Channels {
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/// Construct a new set of channels.
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///
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/// Note(unsafe): This is only safe to call once.
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pub unsafe fn new() -> Self {
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Self {
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ch1: Channel1::new(),
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ch2: Channel2::new(),
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ch3: Channel3::new(),
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ch4: Channel4::new(),
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}
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}
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}
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timer_channel!(
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Channel1,
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hal::stm32::TIM2,
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(cc1de, ccr1, ccmr1_output, cc1s)
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);
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timer_channel!(
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Channel2,
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hal::stm32::TIM2,
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(cc2de, ccr2, ccmr1_output, cc1s)
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);
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timer_channel!(
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Channel3,
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hal::stm32::TIM2,
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(cc3de, ccr3, ccmr2_output, cc3s)
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);
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timer_channel!(
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Channel4,
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hal::stm32::TIM2,
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(cc4de, ccr4, ccmr2_output, cc4s)
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);
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}
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timer_channels!(TIM2);
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