Commit Graph

1116 Commits

Author SHA1 Message Date
Robert Jördens a31c9a5a7a
Merge pull request #234 from vertigo-designs/feature/multi-app-support
Feature/multi app support
2021-01-20 14:09:47 +01:00
Robert Jördens 507e334ec5 lockin: tweak impl 2021-01-20 14:07:57 +01:00
Ryan Summers 4d0b1b5566 Reordering lib.rs 2021-01-20 13:44:53 +01:00
Ryan Summers 86355c9c5d Removing main.rs 2021-01-20 13:44:16 +01:00
Ryan Summers 26677063ea Adding support for multiple applications 2021-01-20 13:43:34 +01:00
Ryan Summers 2ef27b8187 Formatting 2021-01-20 12:55:55 +01:00
Ryan Summers b2cbc6791d Restructuring 2021-01-20 12:55:45 +01:00
Ryan Summers f1f15aca65 Refactoring app structure 2021-01-20 12:49:07 +01:00
Ryan Summers a715680482 Merge branch 'master' into feature/lockin-app-refactor 2021-01-20 12:36:20 +01:00
Ryan Summers 058e474b78
Merge pull request #230 from vertigo-designs/feature/hardware-module
Refactoring to support multiple apps
2021-01-20 12:35:36 +01:00
dependabot[bot] 1f43e4d0b5
build(deps): bump serde from 1.0.118 to 1.0.120
Bumps [serde](https://github.com/serde-rs/serde) from 1.0.118 to 1.0.120.
- [Release notes](https://github.com/serde-rs/serde/releases)
- [Commits](https://github.com/serde-rs/serde/compare/v1.0.118...v1.0.120)

Signed-off-by: dependabot[bot] <support@github.com>
2021-01-20 04:01:24 +00:00
dependabot[bot] 7134df9749
build(deps): bump smoltcp from 0.6.0 to 0.7.0
Bumps [smoltcp](https://github.com/smoltcp-rs/smoltcp) from 0.6.0 to 0.7.0.
- [Release notes](https://github.com/smoltcp-rs/smoltcp/releases)
- [Changelog](https://github.com/smoltcp-rs/smoltcp/blob/master/CHANGELOG.md)
- [Commits](https://github.com/smoltcp-rs/smoltcp/compare/v0.6.0...v0.7.0)

Signed-off-by: dependabot[bot] <support@github.com>
2021-01-20 04:01:23 +00:00
Robert Jördens 778f4ac4d5 lockin: wrapping_neg 2021-01-19 11:30:12 +01:00
Robert Jördens 720b143132 Merge remote-tracking branch 'origin/master' into lockin-bin
* origin/master:
  Updating timer compare offsets
  Removing dac isr clear
  Adding information about DSP timing specifications
  Specifying consequences of failing to meet timing
  Updating dependencies
  Apply suggestions from code review
  Adding documentation about double-buffered mode to DACs
  Updating DACs to utilize DBM
  Adding safety documentation
  Adding docs
  Updating DAC output format, adding DDS stream docs
  Adding documentation for ADCs and DACs
2021-01-19 11:12:50 +01:00
Robert Jördens 20488ea3bc lockin: refine 2021-01-19 11:01:21 +01:00
Robert Jördens 147b0a6982
Merge pull request #228 from matthuszagh/lockin-bin
Lock-in integration testing
2021-01-19 10:59:13 +01:00
Ryan Summers ac06f811ab Adding framework for initial lockin demo 2021-01-18 18:02:00 +01:00
Ryan Summers 573189bdd9 Fixing build 2021-01-18 17:23:21 +01:00
Ryan Summers 9d90d7b0d2 Adding WIP apps 2021-01-18 17:20:33 +01:00
Ryan Summers 6618e921fe Moving panic configuration 2021-01-18 16:55:56 +01:00
Ryan Summers 8dd72ae75e Reordering 2021-01-18 16:52:09 +01:00
Ryan Summers 20535a721d Refactoring to support multiple apps 2021-01-18 16:47:47 +01:00
Ryan Summers d447501c47
Merge pull request #208 from vertigo-designs/feature/io-docs
Adding documentation, updating DAC output timing
2021-01-18 13:54:56 +01:00
Ryan Summers 7a2f950667 Updating timer compare offsets 2021-01-18 13:41:23 +01:00
Ryan Summers 598a48b178 Merge branch 'master' into feature/io-docs 2021-01-18 13:25:03 +01:00
Matt Huszagh 73ffc873cd add lock-in integration test 2021-01-14 15:31:40 -08:00
Matt Huszagh f0eb58dfb2 swap sin and cos for demodulation
The in-phase component should be multiplied by the sin value and the
quadrature component should be multiplied by the cos value.
2021-01-14 14:51:07 -08:00
Matt Huszagh 9a3c9afa7e fix reciprocal_pll divide error when reference frequency is 0 2021-01-14 14:51:07 -08:00
Matt Huszagh 9f0b3eb77e fix shift_round overflow error 2021-01-14 14:51:07 -08:00
Robert Jördens d1aa2f04c4
Merge pull request #226 from matthuszagh/lockin-bin
Lockin binary
2021-01-13 19:17:23 +01:00
Matt Huszagh 9d0aa40ce8 Revert "revert changes in main.rs and server.rs"
This reverts commit e599977983.
2021-01-13 09:54:04 -08:00
Robert Jördens 1d0e1f9651
Merge pull request #222 from matthuszagh/lockin
Lockin
2021-01-13 18:47:37 +01:00
Matt Huszagh 9697560404 reciprocal_pll: remove unneeded type cast 2021-01-13 09:08:16 -08:00
Matt Huszagh e599977983 revert changes in main.rs and server.rs 2021-01-13 08:59:27 -08:00
Matt Huszagh 76088efda5 dsp: add reciprocal_pll 2021-01-13 08:37:33 -08:00
Matt Huszagh 6aad92af43 fix bug in which real signal component is assigned twice 2021-01-12 18:36:18 -08:00
Matt Huszagh 07b7201b49 fix cargo fmt style 2021-01-12 17:26:42 -08:00
Matt Huszagh a0d472b398 use only integer iir 2021-01-12 17:21:55 -08:00
Matt Huszagh f974f4099c remove TODO note relating ADC_BATCHES and calculate_timestamp_timer_period
Having both is not really redundant.
2021-01-12 16:17:58 -08:00
Matt Huszagh 80ed715f5a shift sin/cos before demodulation product to avoid i64 2021-01-12 16:07:04 -08:00
Matt Huszagh 41ea2ebed4 use round up half integer rounding 2021-01-12 15:59:03 -08:00
Matt Huszagh 4c033c0f3e move timestamp handling into new TimestampHandler struct 2021-01-12 13:06:49 -08:00
Matt Huszagh e14aa8b613 move lock-in code to main.rs 2021-01-12 10:45:34 -08:00
Robert Jördens 184a343a7a hitl: dispatch entire github object 2021-01-12 19:06:47 +01:00
Matt Huszagh 891aad3f17 remove debug_assert in divide_round 2021-01-12 07:43:28 -08:00
Matt Huszagh 31d23a3e0c lock-in: use same method for batch_index branching in both instances 2021-01-12 07:36:56 -08:00
Matt Huszagh bae295140d update lock-in for integer math and PLL 2021-01-12 07:36:56 -08:00
Matt Huszagh 028f4a1bb2 fix small typos 2021-01-12 07:36:56 -08:00
Ryan Summers ad3681f30b
Merge pull request #223 from quartiq/rs/issue-219/adc-setup
Conforming to external ADC conversion timing
2021-01-12 07:05:17 -08:00
Ryan Summers db3a42a7b9
Update src/adc.rs
Co-authored-by: Robert Jördens <rj@quartiq.de>
2021-01-12 06:54:16 -08:00