Matt Huszagh
76088efda5
dsp: add reciprocal_pll
2021-01-13 08:37:33 -08:00
Matt Huszagh
6aad92af43
fix bug in which real signal component is assigned twice
2021-01-12 18:36:18 -08:00
Matt Huszagh
07b7201b49
fix cargo fmt style
2021-01-12 17:26:42 -08:00
Matt Huszagh
a0d472b398
use only integer iir
2021-01-12 17:21:55 -08:00
Matt Huszagh
f974f4099c
remove TODO note relating ADC_BATCHES and calculate_timestamp_timer_period
...
Having both is not really redundant.
2021-01-12 16:17:58 -08:00
Matt Huszagh
80ed715f5a
shift sin/cos before demodulation product to avoid i64
2021-01-12 16:07:04 -08:00
Matt Huszagh
41ea2ebed4
use round up half integer rounding
2021-01-12 15:59:03 -08:00
Matt Huszagh
4c033c0f3e
move timestamp handling into new TimestampHandler struct
2021-01-12 13:06:49 -08:00
Matt Huszagh
e14aa8b613
move lock-in code to main.rs
2021-01-12 10:45:34 -08:00
Matt Huszagh
891aad3f17
remove debug_assert in divide_round
2021-01-12 07:43:28 -08:00
Matt Huszagh
31d23a3e0c
lock-in: use same method for batch_index branching in both instances
2021-01-12 07:36:56 -08:00
Matt Huszagh
bae295140d
update lock-in for integer math and PLL
2021-01-12 07:36:56 -08:00
Matt Huszagh
028f4a1bb2
fix small typos
2021-01-12 07:36:56 -08:00
Ryan Summers
ad3681f30b
Merge pull request #223 from quartiq/rs/issue-219/adc-setup
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Conforming to external ADC conversion timing
2021-01-12 07:05:17 -08:00
Ryan Summers
db3a42a7b9
Update src/adc.rs
...
Co-authored-by: Robert Jördens <rj@quartiq.de>
2021-01-12 06:54:16 -08:00
6b170c25ed
Fixing timing synchronization
2021-01-12 13:29:15 +01:00
91975993cf
Fixing docs
2021-01-11 12:38:20 +01:00
d5c21efc9d
Adding extra DMA transfer to clear TXTF in ADC SPI transfers
2021-01-11 12:31:15 +01:00
Ryan Summers
1307ddb0ba
Merge pull request #196 from vertigo-designs/feature/pounder-timestamping
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Feature/pounder timestamping
2021-01-11 01:50:09 -08:00
f785ec2f51
hitl: dispatch stabilizer event
2021-01-08 19:13:48 +01:00
09a7ab2773
ci: correctly use stable toolchain
2021-01-08 19:09:42 +01:00
96dc13da35
hitl: rename, add badge
2021-01-08 19:05:51 +01:00
5ecb28fb05
Merge pull request #220 from quartiq/jordens-hitl
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hardware in the loop testing
2021-01-08 17:30:12 +01:00
72d69960ca
Create hitl.yml
2021-01-08 17:28:07 +01:00
f6062c666e
Fixing pounder v1.1 build
2021-01-06 15:13:28 +01:00
18068082ac
Fixing CI
2021-01-06 15:04:06 +01:00
e9cef7bbac
Fixing after review
2021-01-06 14:59:01 +01:00
29a89637f8
Merge branch 'master' into feature/pounder-timestamping
2021-01-06 14:45:56 +01:00
Ryan Summers
a2fb4630b8
Merge pull request #195 from vertigo-designs/feature/digital-input-stamp
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Feature/digital input stamp
2021-01-06 05:45:04 -08:00
8a98428ed4
Adding documentation
2021-01-06 14:42:36 +01:00
3899848815
Merge branch 'feature/digital-input-stamp' into feature/pounder-timestamping
2021-01-06 13:37:33 +01:00
96485c4229
Reverting unintended diff
2021-01-06 13:36:13 +01:00
37595405c3
Merge branch 'feature/digital-input-stamp' into feature/pounder-timestamping
2021-01-06 13:34:55 +01:00
da34756df7
Adding support for pounder v1.1
2021-01-06 13:29:19 +01:00
3332a8e927
Updating branch dependencies
2021-01-06 12:59:24 +01:00
9e7bfd4371
Adding updates after review
2021-01-06 12:24:09 +01:00
e831c7b11f
Merge pull request #213 from matthuszagh/pll
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pll update input is named "x" not "input"
2021-01-05 09:38:02 +01:00
Matt Huszagh
a3cd17fd70
pin clippy to stable
2021-01-04 16:37:46 -08:00
Matt Huszagh
13543ce048
pll update input is named "x" not "input"
2021-01-04 11:14:27 -08:00
2b6e6f59a4
Adding comment about sample rate
2021-01-04 18:09:16 +01:00
7ecd08d86b
More updates after PR review
2021-01-04 18:04:01 +01:00
67b6990fc0
Addressing PR review
2021-01-04 17:12:24 +01:00
bors[bot]
1bf71f335b
Merge #210
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210: iir_int: add optimized integer iir implementation r=jordens a=jordens
Co-authored-by: Robert Jördens <rj@quartiq.de>
2020-12-22 15:51:39 +00:00
cc42c0c477
iir_int: add optimized integer iir implementation
2020-12-22 16:49:12 +01:00
bors[bot]
40e12e8a7d
Merge #209
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209: Rj/refine atan2 r=jordens a=jordens
Co-authored-by: Robert Jördens <rj@quartiq.de>
2020-12-20 20:10:44 +00:00
8d9af70c19
trig/atan2: refine
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* use dynamic scaling of the inputs to get accurate ratios (effectively
floating point) to maintain accuracy for small arguments
* this also allows shifting later and keep more bits
* use u32 ratio to keep one more bit
* merge the corner case unittests into the big test value list
* print rms, absolute and axis-relative angle
* simplify the correction expression to get rid of one multiplication
* use 5 bit for the correction constant and 15 bits for r
* least squares optimal correction constant, this lowers the max error
below 5e-5
2020-12-20 21:07:23 +01:00
12d5945d81
dsp/testing: simplify
2020-12-20 20:23:32 +01:00
bors[bot]
2f122d12fa
Merge #207
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207: atan r=jordens a=matthuszagh
Adds 2-argument arctangent function. Parameters and result are `i32` integers for fast computation. Only the 16 MSBs of the inputs are used (16 LSBs are discarded). The x and y inputs can range from -1 to 1, which corresponds to `i32::MIN` and `i32::MAX`, respectively. The output ranges from -pi to pi, which corresponds to `i32::MIN` and `i32::MAX`, respectively.
- [godbolt](https://rust.godbolt.org/z/nahKrT )
# Related
- #206
Co-authored-by: Matt Huszagh <huszaghmatt@gmail.com>
2020-12-17 22:28:55 +00:00
Matt Huszagh
7e794373f4
atan2: fix output range description
2020-12-17 14:21:39 -08:00
Matt Huszagh
3125365a15
add atan2 host benchmark
2020-12-17 14:01:57 -08:00
