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dc2e0f8b07
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dual channel
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2019-03-28 12:13:47 +00:00 |
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7f378a3f3d
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clean dcache
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2019-03-28 10:47:15 +00:00 |
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9350f17ca3
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calculate pi coefficients
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2019-03-28 10:09:50 +00:00 |
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ed663b536e
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add prelim iir
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2019-03-27 21:45:43 +00:00 |
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eff2dc6c4e
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led off
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2019-03-27 18:24:58 +00:00 |
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31264452a6
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irq bypass for dma
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2019-03-27 18:19:32 +00:00 |
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2eeb00bb58
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use tim2,dma1 to trigger cr1
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2019-03-27 13:50:25 +00:00 |
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f9e52928fd
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use irq
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2019-03-25 09:08:27 +00:00 |
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32ba1a74b9
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limit backtrace
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2019-03-20 19:28:33 +00:00 |
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aa3feeb14e
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back to tsize=1 adc
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2019-03-20 19:28:23 +00:00 |
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a2265ab2d1
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experiment with duplex adc xfers
problematic because:
* in tsize=1 there needs to be a cstart
* in tsize=0 there is no mssi
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2019-03-20 19:08:31 +00:00 |
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984cef6a4c
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readme, license
|
2019-03-20 18:33:35 +00:00 |
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208980d94d
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refactor into functions
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2019-03-20 18:06:13 +00:00 |
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52a3f8c4b7
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rxdr: 16 bit
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2019-03-20 13:48:28 +00:00 |
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263784ff13
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no midi
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2019-03-20 13:31:48 +00:00 |
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d3d2d4e4f8
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enable i/o compensation cell
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2019-03-20 10:29:13 +00:00 |
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cbd9bcd302
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dac: use inifinite xfers
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2019-03-20 09:51:06 +00:00 |
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4f628c6a41
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cargo: gdb-multicarch
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2019-03-20 09:48:44 +00:00 |
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772b1b4101
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dac tx: different work around
|
2019-03-19 22:02:16 +00:00 |
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4ee7ccb762
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fix afe gain
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2019-03-19 21:52:55 +00:00 |
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bbe79e3484
|
speed up pclk again
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2019-03-19 21:52:48 +00:00 |
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8fbb1c751b
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work around erratum 2.10.2
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2019-03-19 15:39:01 +00:00 |
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4b49f29b17
|
dac
|
2019-03-19 15:27:22 +00:00 |
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b9f27791ab
|
adc
|
2019-03-18 19:10:36 +00:00 |
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a20e0fa3e5
|
speed up
|
2019-03-18 16:57:00 +00:00 |
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44c36b203d
|
working
|
2019-03-18 13:10:00 +00:00 |
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155aa5c032
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start
|
2019-03-18 12:56:26 +01:00 |
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e26b92e15f
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Update README.md
|
2019-03-10 13:08:32 +01:00 |
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1479931451
|
Initial commit
|
2019-03-10 13:02:03 +01:00 |
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