Commit Graph

167 Commits

Author SHA1 Message Date
94faa3ba68 Remove redundancy in super() calls 2020-08-10 11:15:05 +08:00
9e64c7ee17 Add RV32I I-Type Instruction (Shift Variation) 2020-08-07 16:39:14 +08:00
1c0541cd12 Document RV32I R-Type Instructions 2020-08-07 16:06:15 +08:00
9bfd155b44 Add AND instruction 2020-08-07 15:57:19 +08:00
07e4c04b26 Add OR instruction 2020-08-07 15:54:18 +08:00
d06daac123 Add SRA instruction 2020-08-07 15:51:21 +08:00
4f7cf5a370 Add SRL instruction 2020-08-07 15:39:46 +08:00
d106ceede7 Add XOR instruction 2020-08-07 15:35:40 +08:00
cab30848e9 Add SLTU instruction 2020-08-07 15:33:18 +08:00
d33dc1b137 Add SLT instruction 2020-08-07 15:29:54 +08:00
44bdff60c8 Add SLL instruction 2020-08-07 15:25:05 +08:00
060dd98919 Add SUB instruction 2020-08-07 14:00:12 +08:00
ccc1bd098b Add ADD instruction 2020-08-07 13:54:00 +08:00
4f7b11d009 Add RV32I R-Type Instruction 2020-08-07 13:45:35 +08:00
2e2300e5c8 Update insns/README.md 2020-08-07 12:54:31 +08:00
a8cf15e123 Add generic instruction class 2020-08-07 12:28:52 +08:00
56048099b3 Correct typo in insns/README.md 2020-08-06 16:44:54 +08:00
9a3cb8e88a Fix table formatting in insns/README.md 2020-08-06 14:45:51 +08:00
7c420cce7a Categorize all (to be) supported instructions 2020-08-06 14:13:00 +08:00
3eaed129c2 Begin re-organization of project structure 2020-08-06 12:36:01 +08:00
7c60451bfa Add README for instructions 2020-08-05 12:54:46 +08:00
c4e30e9c55 Add REMU instruction 2020-08-04 17:17:37 +08:00
af8704cea0 Add REM instruction 2020-08-04 17:14:46 +08:00
78fb149761 Add DIVU instruction 2020-08-04 17:12:13 +08:00
2a809073a5 Add DIV instruction 2020-08-04 17:09:21 +08:00
7b39ce135f Add MULHU instruction 2020-08-04 17:06:49 +08:00
ee38e3a61d Add MULHSU instruction 2020-08-04 17:04:04 +08:00
a26813835f Add MULH instruction 2020-08-04 17:00:43 +08:00
e1bbf567c2 Add MUL instruction 2020-08-04 16:57:43 +08:00
aa47b866a1 Add AND instruction 2020-08-04 12:54:46 +08:00
9429403616 Add OR instruction 2020-08-04 12:51:48 +08:00
a3a9592c19 Add SRA instruction 2020-08-04 12:47:35 +08:00
907f7240bf Add SRL instruction 2020-08-04 12:42:39 +08:00
0c7c929983 Add XOR instruction 2020-08-04 12:39:20 +08:00
cf9e1c741c Add SLTU instruction 2020-08-04 12:37:26 +08:00
4d313ed54a Add SLT instruction 2020-08-04 12:34:06 +08:00
a6a09ac120 Add SLL instruction 2020-08-04 12:31:36 +08:00
67c57c4d7d Add SUB instruction 2020-08-04 12:25:12 +08:00
aad9a3f2b5 Add ADD instruction 2020-08-04 12:20:52 +08:00
3abdcf07d2 Add R-type instruction format 2020-08-04 12:06:01 +08:00
19099edee3 Add SRAI instruction 2020-08-03 15:10:58 +08:00
eaf475ee04 Add SRLI instruction 2020-08-03 14:54:02 +08:00
0234b65890 Add SLLI instruction 2020-08-03 14:51:36 +08:00
a9cff77a82 Add I-type (shift variation) instruction format 2020-08-03 14:44:33 +08:00
c3821bc885 Add SW instruction 2020-08-03 14:29:52 +08:00
948a3db1c1 Add SH instruction 2020-08-03 14:27:08 +08:00
84454e7048 Add SB instruction 2020-08-03 14:23:40 +08:00
eebb39ee27 Add S-type instruction format 2020-08-03 14:15:09 +08:00
62ae797737 Add BGEU instruction 2020-08-03 11:33:57 +08:00
596d7fcf6d Add BLTU instruction 2020-08-03 11:30:16 +08:00