Commit Graph

288 Commits

Author SHA1 Message Date
Robert Jördens 01416bb0be copyright: claim contributions
These are contributions of >= 30% or >= 20 lines (half-automated).

I hereby resubmit all my previous contributions to the ARTIQ project
under the following terms:

    This program is free software: you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation, either version 3 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program.  If not, see <http://www.gnu.org/licenses/>.

Closes #130

Signed-off-by: Robert Jordens <jordens@gmail.com>
2015-09-06 16:08:57 -06:00
Sebastien Bourdeauducq eb554f86f9 dds: do not reset AD9914 2015-09-05 14:52:25 -06:00
Raghavendra Srinivas b3831d3387 dds: support amplitude tuning on AD9914
Closes #108
2015-09-05 13:15:09 -06:00
Sebastien Bourdeauducq 8253739992 dds: increase DAC calibration time 2015-09-03 09:52:04 -06:00
Sebastien Bourdeauducq 90ce54d8d5 gateware/dds/monitor: support onehot selection, strip reset 2015-08-27 15:54:01 +08:00
Sebastien Bourdeauducq f07c7e9c6f runtime/dds: fix AD9914 register initialization values
Thanks Raghavendra Srinivas for the help. Closes #114.
2015-08-27 10:47:44 +08:00
Sebastien Bourdeauducq fba05531f4 runtime: enable ad9914 matched latency 2015-08-22 12:25:44 +08:00
Sebastien Bourdeauducq 82fdebde75 runtime: support single channel test sequence 2015-08-22 10:43:46 +08:00
Sebastien Bourdeauducq 8d4ef479e5 runtime: test all DDS channels 2015-08-22 10:03:35 +08:00
Sebastien Bourdeauducq e0c35cabab runtime: fix onehot selection in ddstest_one 2015-08-22 09:56:40 +08:00
Sebastien Bourdeauducq 8d8aa32aed runtime: fix AD9914 register read in bridge 2015-08-21 17:51:01 +08:00
Sebastien Bourdeauducq 2c15bd3e44 kc705: add TTL channel on SMA GPIO N 2015-08-18 15:20:42 +08:00
Sebastien Bourdeauducq f2911d67b7 Enable TCP keepalive on the core device
Automatically runs the idle experiment a few seconds after the master stops responding.

Thanks Florent for figuring out TCP_KEEPIDLE_DEFAULT needed to be set in addition to the other options.

Closes #31
2015-08-13 18:33:46 +08:00
Sebastien Bourdeauducq 9b0ed344ed runtime/Makefile: WA for more pesky travis/miniconda misbehavior 2015-07-31 19:29:34 +08:00
whitequark 33531c2f3b Rename {kserver → net_server}.{c,h}. 2015-07-31 18:18:25 +08:00
Sebastien Bourdeauducq 8d1663394b runtime: increase lwip TCP_SND_QUEUELEN (closes #82) 2015-07-31 18:16:02 +08:00
Sebastien Bourdeauducq d02d40871e runtime: update lwip 2015-07-31 18:15:16 +08:00
Robert Jördens 55708e8678 pipistrello: drop bitgen_opt change (done upstream) 2015-07-29 11:45:15 -06:00
Sebastien Bourdeauducq 1d34c06d79 rtio: detect collision errors 2015-07-29 19:43:35 +08:00
whitequark c40ae9dbd3 MiSoC is not built with -fPIC anymore, remove support code for that. 2015-07-29 12:40:46 +03:00
Robert Jördens 67715f0d2e pipistrello: only put serdes on the lower ttls
this setup is getting a bit power hungry.

pmt0, 1 (rtio channels 0, 1): 4x in and out
ttl0, 1 (rtio channels 2, 3): 4x out
ttl2 (rtio channel 4): 8x out
2015-07-28 12:54:31 -06:00
Robert Jördens 9dfbf07743 pipistrello: use 4x serdes for rtio ttl
pipistrello: do not wait for lock on startup

LCK_cycle:6 was added in 6a412f796e1 (mibuild). It waits for _all_
DCM and PLLs to lock (probably irrespective of STARTUP_WAIT).
2015-07-28 12:54:27 -06:00
Sebastien Bourdeauducq 8e391e2661 kc705: generate 10MHz clock on GPIO SMA
For SynthNV and input tests.
2015-07-28 18:56:47 +08:00
Robert Jördens 1809a70f5c Revert "pipistrello: use 4x serdes for rtio ttl"
This reverts commit 8e92cc91f5.

Broken. Will revisit.
2015-07-27 23:39:35 -06:00
Robert Jördens f0a7078336 Revert "rtiocrg.c: pipistrello also has pll_reset"
This reverts commit bdee914828.
2015-07-27 22:18:45 -06:00
Robert Jördens bdee914828 rtiocrg.c: pipistrello also has pll_reset 2015-07-27 22:14:42 -06:00
Robert Jördens e95b06e96d pipistrello: tie unused dds.p low 2015-07-27 21:48:56 -06:00
Robert Jördens 8e92cc91f5 pipistrello: use 4x serdes for rtio ttl 2015-07-27 21:29:50 -06:00
Sebastien Bourdeauducq ae3a52c49c runtime: fix KERNELCPU_PAYLOAD_ADDRESS 2015-07-28 02:12:14 +08:00
whitequark eec4a2d2d2 Update buildsystem to track -fPIC and ranlib removal in MiSoC. 2015-07-27 21:10:46 +03:00
Sebastien Bourdeauducq 0cd74533ca runtime: more explicit message about startup clock failure 2015-07-28 00:38:38 +08:00
Sebastien Bourdeauducq 7feaca7c7c runtime: allow selecting external clock at startup 2015-07-28 00:19:07 +08:00
Sebastien Bourdeauducq 09d837e4ba runtime: monitor RTIO clock status 2015-07-28 00:05:24 +08:00
Sebastien Bourdeauducq 299bc1cb7e kc705: output divided-by-2 RTIO clock 2015-07-27 20:46:44 +08:00
Sebastien Bourdeauducq 256e99f0d7 kc705: crg cleanup 2015-07-27 20:31:37 +08:00
Sebastien Bourdeauducq 2a95e866aa kc705: use 8X SERDES RTIO PHY 2015-07-27 20:12:17 +08:00
Sebastien Bourdeauducq fe57308e71 runtime: support for RTIO PLL 2015-07-27 20:11:31 +08:00
Sebastien Bourdeauducq 117b361a06 Merge branch 'master' of github.com:m-labs/artiq 2015-07-27 11:42:29 +08:00
Sebastien Bourdeauducq 3573fd02a6 targets/kc705: add TIG constraints for ISE 2015-07-27 10:58:19 +08:00
Sebastien Bourdeauducq fe6a5c42df rtio: remove unused clk_freq argument 2015-07-27 10:57:15 +08:00
Sebastien Bourdeauducq d3f05e414a runtime: account for RTIO_FINE_TS_WIDTH in time buffers 2015-07-27 10:50:25 +08:00
Robert Jördens d65d303ac6 pipistrello: remove unused constraint kwarg 2015-07-26 17:39:07 -06:00
whitequark 1d9f40833d Update ldscripts with -fPIC support. 2015-07-26 16:16:48 +03:00
Sebastien Bourdeauducq aba2d3f112 runtime: process essential kernel CPU messages at all time 2015-07-25 16:26:04 +08:00
Sebastien Bourdeauducq 34aacd3c5f complete AD9914 support (no programmable modulus, untested) 2015-07-08 17:22:43 +02:00
Sebastien Bourdeauducq 8a33d8c868 never stop RTIO counter 2015-07-07 15:29:38 +02:00
Sebastien Bourdeauducq d20fb5abb2 remove workaround 2015-07-07 13:46:14 +02:00
Robert Jördens 959ba99f1c pipistrello: try simpler constraints 2015-07-04 21:08:28 -06:00
Sebastien Bourdeauducq 753d61b38f complete support for TTL clock generator 2015-07-04 18:36:01 +02:00
Sebastien Bourdeauducq 0a9f9093f7 kc705: fix ttl15 2015-07-02 20:02:05 +02:00