mirror of
https://github.com/m-labs/artiq.git
synced 2024-12-25 19:28:26 +08:00
rtiocrg.c: pipistrello also has pll_reset
This commit is contained in:
parent
e95b06e96d
commit
bdee914828
@ -10,9 +10,7 @@ void rtiocrg_init(void)
|
||||
char b;
|
||||
int clk;
|
||||
|
||||
#ifdef CSR_RTIO_CRG_PLL_RESET_ADDR
|
||||
rtio_crg_pll_reset_write(0);
|
||||
#endif
|
||||
b = 'i';
|
||||
clk = 0;
|
||||
fs_read("startup_clock", &b, 1, NULL);
|
||||
@ -33,11 +31,7 @@ void rtiocrg_init(void)
|
||||
|
||||
int rtiocrg_check(void)
|
||||
{
|
||||
#ifdef CSR_RTIO_CRG_PLL_RESET_ADDR
|
||||
return rtio_crg_pll_locked_read();
|
||||
#else
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
int rtiocrg_switch_clock(int clk)
|
||||
@ -46,22 +40,16 @@ int rtiocrg_switch_clock(int clk)
|
||||
|
||||
current_clk = rtio_crg_clock_sel_read();
|
||||
if(clk == current_clk) {
|
||||
#ifdef CSR_RTIO_CRG_PLL_RESET_ADDR
|
||||
busywait_us(150);
|
||||
if(!rtio_crg_pll_locked_read())
|
||||
return 0;
|
||||
#endif
|
||||
return 1;
|
||||
}
|
||||
#ifdef CSR_RTIO_CRG_PLL_RESET_ADDR
|
||||
rtio_crg_pll_reset_write(1);
|
||||
#endif
|
||||
rtio_crg_clock_sel_write(clk);
|
||||
#ifdef CSR_RTIO_CRG_PLL_RESET_ADDR
|
||||
rtio_crg_pll_reset_write(0);
|
||||
busywait_us(150);
|
||||
if(!rtio_crg_pll_locked_read())
|
||||
return 0;
|
||||
#endif
|
||||
return 1;
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user