mirror of https://github.com/m-labs/artiq.git
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2921bd6501
commit
b3831d3387
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@ -89,6 +89,17 @@ class _DDSGeneric:
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word."""
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return pow/2**self.pow_width
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@portable
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def amplitude_to_asf(self, amplitude):
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"""Returns amplitude scale factor corresponding to given amplitude."""
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return round(amplitude*0x0fff)
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@portable
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def asf_to_amplitude(self, asf):
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"""Returns the amplitude corresponding to the given amplitude scale
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factor."""
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return round(amplitude*0x0fff)
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@kernel
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def init(self):
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"""Resets and initializes the DDS channel.
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@ -117,12 +128,14 @@ class _DDSGeneric:
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self.phase_mode = phase_mode
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@kernel
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def set_mu(self, frequency, phase=0, phase_mode=_PHASE_MODE_DEFAULT):
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def set_mu(self, frequency, phase=0, phase_mode=_PHASE_MODE_DEFAULT,
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amplitude=0x0fff):
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"""Sets the DDS channel to the specified frequency and phase.
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This uses machine units (FTW and POW). The frequency tuning word width
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is 32, whereas the phase offset word width depends on the type of DDS
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chip and can be retrieved via the ``pow_width`` attribute.
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chip and can be retrieved via the ``pow_width`` attribute. The amplitude
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width is 12.
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:param frequency: frequency to generate.
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:param phase: adds an offset, in turns, to the phase.
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@ -132,13 +145,15 @@ class _DDSGeneric:
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if phase_mode == _PHASE_MODE_DEFAULT:
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phase_mode = self.phase_mode
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syscall("dds_set", now_mu(), self.channel, frequency,
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phase, phase_mode)
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phase, phase_mode, amplitude)
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@kernel
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def set(self, frequency, phase=0.0, phase_mode=_PHASE_MODE_DEFAULT):
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def set(self, frequency, phase=0.0, phase_mode=_PHASE_MODE_DEFAULT,
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amplitude=1.0):
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"""Like ``set_mu``, but uses Hz and turns."""
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self.set_mu(self.frequency_to_ftw(frequency),
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self.turns_to_pow(phase), phase_mode)
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self.turns_to_pow(phase), phase_mode,
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self.amplitude_to_asf(amplitude))
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class AD9858(_DDSGeneric):
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@ -25,7 +25,7 @@ _syscalls = {
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"dds_init": "Ii:n",
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"dds_batch_enter": "I:n",
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"dds_batch_exit": "n:n",
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"dds_set": "Iiiii:n",
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"dds_set": "Iiiiii:n",
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}
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@ -19,7 +19,7 @@
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#define DURATION_DAC_CAL (147000 << RTIO_FINE_TS_WIDTH)
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/* not counting final FUD */
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#define DURATION_INIT (10*DURATION_WRITE + DURATION_DAC_CAL)
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#define DURATION_PROGRAM (5*DURATION_WRITE) /* not counting FUD */
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#define DURATION_PROGRAM (6*DURATION_WRITE) /* not counting FUD */
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#else
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#error Unknown DDS configuration
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@ -94,7 +94,7 @@ void dds_init(long long int timestamp, int channel)
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static unsigned int continuous_phase_comp[DDS_CHANNEL_COUNT];
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static void dds_set_one(long long int now, long long int ref_time, unsigned int channel,
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unsigned int ftw, unsigned int pow, int phase_mode)
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unsigned int ftw, unsigned int pow, int phase_mode, unsigned int amplitude)
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{
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unsigned int channel_enc;
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@ -130,7 +130,8 @@ static void dds_set_one(long long int now, long long int ref_time, unsigned int
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DDS_WRITE(DDS_CFR2, 0x00);
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#endif
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#ifdef DDS_AD9914
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DDS_WRITE(DDS_CFR1L, 0x0008);
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/* Disable autoclear phase accumulator and enables OSK. */
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DDS_WRITE(DDS_CFR1L, 0x0108);
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#endif
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pow += continuous_phase_comp[channel];
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} else {
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@ -141,7 +142,8 @@ static void dds_set_one(long long int now, long long int ref_time, unsigned int
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DDS_WRITE(DDS_CFR2, 0x40);
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#endif
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#ifdef DDS_AD9914
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DDS_WRITE(DDS_CFR1L, 0x2008);
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/* Enable autoclear phase accumulator and enables OSK. */
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DDS_WRITE(DDS_CFR1L, 0x2108);
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#endif
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fud_time = now + 2*DURATION_WRITE;
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pow -= (ref_time - fud_time)*DDS_RTIO_CLK_RATIO*ftw >> (32-DDS_POW_WIDTH);
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@ -156,6 +158,9 @@ static void dds_set_one(long long int now, long long int ref_time, unsigned int
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#endif
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#ifdef DDS_AD9914
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DDS_WRITE(DDS_POW, pow);
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#endif
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#ifdef DDS_AD9914
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DDS_WRITE(DDS_ASF, amplitude);
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#endif
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DDS_WRITE(DDS_FUD, 0);
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}
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@ -165,6 +170,7 @@ struct dds_set_params {
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unsigned int ftw;
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unsigned int pow;
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int phase_mode;
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unsigned int amplitude;
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};
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static int batch_mode;
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@ -193,14 +199,15 @@ void dds_batch_exit(void)
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now = batch_ref_time - batch_count*(DURATION_PROGRAM + DURATION_WRITE);
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for(i=0;i<batch_count;i++) {
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dds_set_one(now, batch_ref_time,
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batch[i].channel, batch[i].ftw, batch[i].pow, batch[i].phase_mode);
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batch[i].channel, batch[i].ftw, batch[i].pow, batch[i].phase_mode,
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batch[i].amplitude);
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now += DURATION_PROGRAM + DURATION_WRITE;
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}
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batch_mode = 0;
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}
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void dds_set(long long int timestamp, int channel,
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unsigned int ftw, unsigned int pow, int phase_mode)
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unsigned int ftw, unsigned int pow, int phase_mode, unsigned int amplitude)
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{
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if(batch_mode) {
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if(batch_count >= DDS_MAX_BATCH)
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@ -210,9 +217,11 @@ void dds_set(long long int timestamp, int channel,
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batch[batch_count].ftw = ftw;
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batch[batch_count].pow = pow;
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batch[batch_count].phase_mode = phase_mode;
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batch[batch_count].amplitude = amplitude;
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batch_count++;
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} else {
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rtio_chan_sel_write(RTIO_DDS_CHANNEL);
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dds_set_one(timestamp - DURATION_PROGRAM, timestamp, channel, ftw, pow, phase_mode);
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dds_set_one(timestamp - DURATION_PROGRAM, timestamp, channel, ftw, pow, phase_mode,
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amplitude);
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}
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}
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@ -59,6 +59,6 @@ void dds_init(long long int timestamp, int channel);
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void dds_batch_enter(long long int timestamp);
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void dds_batch_exit(void);
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void dds_set(long long int timestamp, int channel,
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unsigned int ftw, unsigned int pow, int phase_mode);
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unsigned int ftw, unsigned int pow, int phase_mode, unsigned int amplitude);
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#endif /* __DDS_H */
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