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kc705: add TTL channel on SMA GPIO N

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This commit is contained in:
Sebastien Bourdeauducq 2015-08-18 15:20:42 +08:00
parent 600e8335f2
commit 2c15bd3e44
2 changed files with 13 additions and 1 deletions
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8
examples/master/ddb.pyon
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@ -49,11 +49,17 @@
"class": "TTLOut",
"arguments": {"channel": 5}
},
"ttl_sma": {
"type": "local",
"module": "artiq.coredevice.ttl",
"class": "TTLInOut",
"arguments": {"channel": 17}
},
"led": {
"type": "local",
"module": "artiq.coredevice.ttl",
"class": "TTLOut",
"arguments": {"channel": 17}
"arguments": {"channel": 18}
},
"dds_bus": {

6
soc/targets/artiq_kc705.py
View File

@ -148,6 +148,9 @@ class NIST_QC1(_NIST_QCx):
self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy))
phy = ttl_simple.Inout(platform.request("user_sma_gpio_n"))
self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy))
phy = ttl_simple.Output(platform.request("user_led", 2))
self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy))
@ -187,6 +190,9 @@ class NIST_QC2(_NIST_QCx):
self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy))
phy = ttl_simple.Inout(platform.request("user_sma_gpio_n"))
self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy))
phy = ttl_simple.Output(platform.request("user_led", 2))
self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy))