mirror of https://github.com/m-labs/artiq.git
runtime: support for RTIO PLL
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d7138b25f2
commit
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@ -253,6 +253,10 @@ int main(void)
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puts("Press 't' to enter test mode...");
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blink_led();
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#ifdef CSR_RTIO_CRG_PLL_RESET_ADDR
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rtio_crg_pll_reset_write(0);
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#endif
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if(check_test_mode()) {
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puts("Entering test mode.");
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test_main();
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@ -128,6 +128,22 @@ static int check_flash_storage_key_len(char *key, unsigned int key_len)
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return 1;
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}
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static void switch_clock(int clk)
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{
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int current_clk;
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current_clk = rtio_crg_clock_sel_read();
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if(clk == current_clk)
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return;
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#ifdef CSR_RTIO_CRG_PLL_RESET_ADDR
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rtio_crg_pll_reset_write(1);
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#endif
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rtio_crg_clock_sel_write(clk);
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#ifdef CSR_RTIO_CRG_PLL_RESET_ADDR
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rtio_crg_pll_reset_write(0);
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#endif
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}
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static int process_input(void)
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{
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switch(buffer_in[8]) {
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@ -154,7 +170,7 @@ static int process_input(void)
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submit_output(9);
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break;
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}
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rtio_crg_clock_sel_write(buffer_in[9]);
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switch_clock(buffer_in[9]);
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buffer_out[8] = REMOTEMSG_TYPE_CLOCK_SWITCH_COMPLETED;
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submit_output(9);
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break;
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