artiq/soc
Sebastien Bourdeauducq 8e391e2661 kc705: generate 10MHz clock on GPIO SMA
For SynthNV and input tests.
2015-07-28 18:56:47 +08:00
..
runtime Revert "rtiocrg.c: pipistrello also has pll_reset" 2015-07-27 22:18:45 -06:00
targets kc705: generate 10MHz clock on GPIO SMA 2015-07-28 18:56:47 +08:00