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70 Commits (c428800caf52a77a22a9be0d967715cccb4e0b63)

Author SHA1 Message Date
Robert Jördens c428800caf phaser: spi, sma_gpio: 2.5 V 2016-10-27 15:53:49 +02:00
Florent Kermarrec 0259c80015 phaser/kc705: remove transceiver initialization workaround 2016-10-14 19:06:43 +02:00
Robert Jördens b41b9de905 phaser: tag jesd as clock net 2016-10-14 10:46:33 +02:00
Robert Jördens 4ea3dea217 phaser: broad spectrum antibiotics with xilinx false paths 2016-10-14 10:22:03 +02:00
Robert Jördens e400f8d672 phaser: add two more registers before jesd 2016-10-14 09:54:56 +02:00
Robert Jördens 3c9c42c779 phaser: drive rtio from jesd-bufg 2016-10-14 02:26:19 +02:00
Robert Jördens 808874a523 phaser: drive cd_jesd with BUFG 2016-10-14 01:57:48 +02:00
Robert Jördens 342d6d756e phaser: bypass gtx phalign 2016-10-14 00:59:53 +02:00
Robert Jördens 89150c9817 phaser: 10G line rate 2016-10-14 00:53:38 +02:00
Robert Jördens 42c6658ffe phaser: add some more blinking leds 2016-10-13 15:21:27 +02:00
Robert Jördens 6a456bd7d4 phaser: feed correct sink (crucial) 2016-10-13 15:17:38 +02:00
Robert Jördens c8e45ae3f6 phaser: cleanup jesd phy instantiation a bit 2016-10-13 14:43:24 +02:00
Robert Jördens 78a41eec8f phaser: kc705: syntax 2016-10-13 12:38:32 +02:00
Florent Kermarrec af0e8582a2 phaser: use new jesd clocking 2016-10-13 11:51:06 +02:00
Robert Jördens 1117fe191b phaser: support core stpl 2016-10-12 12:03:29 +02:00
Robert Jördens f515c11f26 phaser: fix refclk period spec 2016-10-11 20:13:34 +02:00
Robert Jördens bae5b73155 phaser: comment out stpl test 2016-10-11 19:50:19 +02:00
Robert Jördens 2b1cca2e7e phaser: stpl 2016-10-11 19:29:27 +02:00
Robert Jördens 18d18b6685 phaser: add sync ttl input for monitoring 2016-10-10 17:13:23 +02:00
Florent Kermarrec c08caae171 phaser: use qpll 2016-10-10 17:05:42 +02:00
Robert Jördens 9b860b26e8 phaser: fix rtio pll inputs 2016-10-07 13:00:42 +02:00
Robert Jördens 09434ec054 phaser: also adapt rtio_crg 2016-10-07 12:44:22 +02:00
Florent Kermarrec b02a7234f6 phaser: use 125MHz refclk for jesd 2016-10-07 08:59:34 +02:00
Robert Jördens 1193ba4bf4 ad9154: merge csr spaces 2016-10-06 16:21:15 +02:00
Robert Jördens 4d87f0e9e0 phaser: instantiate jesd204b core, wire up 2016-10-06 14:44:22 +02:00
Robert Jördens 4a0eaf0f95 phaser: add jesd204b rtio dds 
gateware: add jesd204b awg

gateware: copy phaser (df3825a)
dsp/tools: update satadd mixin
phaser: no DDS stubs
dsp: accu fix
phaser: cleanup/reduce

sawg: kernel support and docs

sawg: coredevice api fixes

sawg: example ddb/experiment

phaser: add conda package

examples/phaser: typo

sawg: adapt tests, fix accu stb

sawg: tweak dds parameters

sawg: move/adapt/extend tests

sawg: test phy, refactor

phaser: non-rtio spi

phaser: target cli update

phaser: ad9154-fmc-ebz pins

phaser: reorganize fmc signal naming

phaser: add test mode stubs

phaser: txen is LVTTL

phaser: clk spi xfer test

phaser: spi for ad9154 and ad9516

phaser: spi tweaks

ad9154: add register map from ad9144.xml

ad9516: add register map from ad9517.xml and manual adaptation

ad9154_reg: just generate getter/setter macros as well

ad9154: reg WIP

ad9154: check and fix registers

kc705: single ended rtio_external_clk

use single ended user_sma_clk_n instead of p/n to free up one clock sma

kc705: mirror clk200 at user_sma_clock_p

ad9516_regs.h: fix B_COUNTER_MSB

phase: wire up clocking differently

needs patched misoc

kc705: feed rtio_external_clock directly

kc705: remove rtio_external_clk for phaser

phaser: spi tweaks

ad9516: some startup

ad9516_reg fixes

phaser: setup ad9516 for supposed 500 MHz operation

ad9516: use full duplex spi

ad9154_reg: add CONFIG_REG_2

ad9154_reg: fixes

phaser: write some ad9154 config

ad9154_reg: fixes

ad9154: more init, and human readable setup

ad9154/ad9516: merge spi support

ad9154: status readout

Revert "kc705: remove rtio_external_clk for phaser"

This reverts commit d500288bb44f2bf2eeb0c2f237aa207b0a8b1366.

Revert "kc705: feed rtio_external_clock directly"

This reverts commit 8dc7825519e3e75b7d3d29c9abf10fc6e3a8b4c5.

Revert "phase: wire up clocking differently"

This reverts commit ad9cc450ffa35abb54b0842d56f6cf6c53c6fbcc.

Revert "kc705: mirror clk200 at user_sma_clock_p"

This reverts commit 7f0dffdcdd28e648af84725682f82ec6e5642eba.

Revert "kc705: single ended rtio_external_clk"

This reverts commit a9426d983fbf5c1cb768da8f1da26d9b7335e9cf.

ad9516: 2000 MHz clock

phaser: test clock dist

phaser: test freqs

ad9154: iostandards

phaser: drop clock monitor

phaser: no separate i2c

phaser: drive rtio from refclk, wire up sysref

phaser: ttl channel for sync

ad9154: 4x interp, status, tweaks

phaser: sync/sysref 33V banks

phaser: sync/sysref LVDS_25 inputs are VCCO tolerant

phaser: user input-only ttls

phaser: rtio fully from refclk

ad9154: reg name usage fix

ad9154: check register modifications

Revert "ad9154: check register modifications"

This reverts commit 45121d90edf89f7bd8703503f9f317ad050f9564.

ad9154: fix status code

ad9154: addrinc, recal serdes pll

phaser: coredevice, example tweaks

sawg: missing import

sawg: type fixes

ad9514: move setup functions

ad9154: msb first also decreasing addr

phaser: use sys4x for rtio internal ref

phaser: move init code to main

phaser: naming cleanup

phaser: cleanup pins

phaser: move spi to kernel cpu

phaser: kernel support for ad9154 spi

ad9154: add r/w methods

ad9154: need return annotations

ad9154: r/w methods are kernels

ad9154_reg: portable helpers

phaser: cleanup startup kernel

ad9154: status test

ad9154: prbs test

ad9154: move setup, document

phaser: more documentation
 2016-10-05 16:17:50 +02:00
Sebastien Bourdeauducq 8280e72e90 gateware: use new misoc CSR mapping API 2016-09-24 20:48:37 +08:00
Sebastien Bourdeauducq 8cb29fcb3b targets/kc705: redefine user SMAs as 3.3V IO. Closes #502 2016-07-07 14:53:01 +08:00
dhslichter 141edb521a qc2: swap SPI/TTL, all TTL lines are now In+Out compatible 2016-05-19 10:42:03 +08:00
Sebastien Bourdeauducq 9707981c07 targets/kc705: fix default -H option 2016-04-30 00:30:24 +08:00
dhslichter f395a630e0 Updated qc2 pinouts for SPI and 2x DDS bus, update docs 2016-04-13 18:38:34 +08:00
Sebastien Bourdeauducq ed1c368e73 gateware: name targets consistently. Closes #290 2016-04-05 16:07:29 +08:00
Sebastien Bourdeauducq 0e1f75ec49 targets/kc705/qc2: hook up HPC backplane 2016-03-16 16:19:56 +08:00
Sebastien Bourdeauducq f0b0b1bac7 support for multiple DDS buses (untested) 2016-03-09 17:12:50 +08:00
Sebastien Bourdeauducq e8b59b00f6 soc: use add_extra_software_packages, factor builder code 2016-03-07 00:18:47 +08:00
Sebastien Bourdeauducq a8a74d7840 targets/kc705: enable I2C for all hardware adapters 2016-03-05 00:19:59 +08:00
Robert Jördens 7ff0c89d51 kc705.clock: add all spi buses 2016-03-04 00:03:48 +01:00
Sebastien Bourdeauducq 423ca03f3b runtime: bit-banged i2c support (untested) 2016-03-03 17:46:42 +08:00
Sebastien Bourdeauducq cfe72c72a2 gateware/kc705: add I2C GPIO core for QC2 2016-03-03 15:32:10 +08:00
Sebastien Bourdeauducq a901971e58 gateware/soc: factor code to connect CSR device to kernel CPU 2016-03-03 15:12:15 +08:00
Sebastien Bourdeauducq 9af12230c8 soc: add timer to kernel CPU system 2016-03-03 13:19:17 +08:00
Robert Jördens d3f36ce784 kc705: add false paths for ethernet phy 
* vivado prefers rsys_clk over sys_clk (despite the assignment hierarchy)
  (We need DONT_TOUCH and/or KEEP verilog annotations to fix this)
 2016-03-02 19:56:24 +01:00
Robert Jördens 2cc1dfaee3 kc705: move ttl channels together again, update doc 2016-03-01 19:40:32 +01:00
Robert Jördens f2ec8692c0 nist_clock: disable spi1/2 2016-03-01 01:52:46 +01:00
Robert Jördens 7ef21f03b9 nist_clock: add SPIMasters to spi buses 2016-02-29 22:19:39 +01:00
Robert Jördens 7ab7f7d75d Merge branch 'master' into spimaster 
* master:
  artiq_flash: use term 'gateware'
  targets/kc705-nist_clock: add clock generator on LA32 for testing purposes
  doc: insist that output() must be called on TTLInOut. Closes #297
  doc: update install instructions
  coredevice: do not give up on UTF-8 errors in log. Closes #300
  use m-labs setup for defaults
  fix indentation
 2016-02-29 20:47:52 +01:00
Sebastien Bourdeauducq 5fad570f5e targets/kc705-nist_clock: add clock generator on LA32 for testing purposes 2016-03-01 00:35:26 +08:00
Sebastien Bourdeauducq 572c49f475 use m-labs setup for defaults 2016-02-29 21:35:23 +08:00
Robert Jördens ad34927b0a spi: RTIO_SPI_CHANNEL -> RTIO_FIRST_SPI_CHANNEL 2016-02-29 11:35:49 +01:00
Robert Jördens d5893d15fb gateware.kc705: make xadc/ams an extension header 2016-02-28 22:41:17 +01:00