Commit Graph

26 Commits

Author SHA1 Message Date
occheung cea0a15e1e suservo: use default urukul profile 2022-01-10 16:21:39 +08:00
occheung 9d493028e5 gateware/suservo: write to profile 7
Fixes #1817.
2022-01-07 16:41:19 +08:00
Peter Drmota 20e079a381
AD9910 driver feature extension and SUServo IIR readability (#1500)
* coredevice.ad9910: Add set_cfr2 function and extend arguments of set_cfr1 and set_sync

* SUServo: Wrap CPLD and DDS devices in a list

* SUServo: Refactor [nfc]

Co-authored-by: drmota <peter.drmota@physics.ox.ac.uk>
Co-authored-by: David Nadlinger <code@klickverbot.at>
2021-11-15 12:09:16 +08:00
Robert Jördens 56074cfffa suservo: support operating with one urukul
implemented by wiring up the second Urukul to dummy pins

Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-12-02 11:30:20 +01:00
David Nadlinger 720838a23e gateware/suservo: Avoid magic number for activation delay width
Mostly for documentation purposes; 8 bits ought to be enough for
everyone.
2019-06-14 23:45:40 +01:00
hartytp cfe1f56f73
suservo: add some more comments to the RTServoMem to clarify the RTIO interface (#1323) 2019-05-17 16:12:35 +01:00
hartytp c55460f59f suservo: fix doc typo 2018-09-03 11:48:40 +02:00
Robert Jördens 9b5a46dffd suservo: fix restart counter assertion
c.f. #788
2018-05-31 15:56:11 +00:00
Robert Jördens 504d37b66b suservo: add SI units functions and document
m-labs/artiq#788
2018-05-14 12:26:49 +00:00
Robert Jördens d71e4e60a9 suservo: use addition for offset 2018-05-14 12:26:49 +00:00
Robert Jördens 2a47b934ea suservo: remove adc return clock gating 2018-05-14 12:26:49 +00:00
Robert Jördens 74c0b4452b suservo: clkout and sdo[b-d] are inverted 2018-05-14 12:26:49 +00:00
Robert Jördens 04240cdc08 suservo: sampler channels are reversed 2018-05-14 12:25:09 +00:00
Robert Jördens f055bf88f6 suservo: add clip flags (#992) 2018-05-09 07:16:15 +00:00
Robert Jördens 5f00326c65 suservo: coeff mem write port READ_FIRST 2018-04-27 15:43:32 +00:00
Robert Jördens 307cd07b9d suservo: lots of gateware/ runtime changes
tested/validated:

* servo enable/disable
* dds interface, timing, io_update, mask_nu
* channel control (en_out, en_iir, profile)
* profile configuration (coefficients, delays, offsets, channel)
* adc timings and waveforms measured
* asf state readback
* adc readback

individual changes below:

suservo: correct rtio readback

suservo: example, device_db [wip]

suservo: change rtio channel layout

suservo: mem ports in rio domain

suservo: sck clocked from rio_phy

suservo: cleanup, straighten out timing

suservo: dds cs polarity

suservo: simplify pipeline

suservo: drop unused eem names

suservo: decouple adc SR from IIR

suservo: expand coredevice layer

suservo: start the correct stage

suservo: actually load ctrl

suservo: refactor/tweak adc timing

suservo: implement cpld and dds init
2018-04-27 13:50:26 +02:00
Robert Jördens 105068ad90 suservo: fix restart timing 2018-04-25 15:19:49 +00:00
Robert Jördens c304b6207a suservo: drop adc idelays 2018-04-25 14:59:50 +00:00
Robert Jördens b44d6517d1 suservo: use 125 MHz SDR ADC
* easier timing
* natural sampling on rising edge
* timing, signal robustness
* adjust the servo iteration timing
2018-04-25 14:32:23 +00:00
Robert Jördens 37c186a0fc suservo: refactor, constrain
* remove DiffMixin, move pad layout handling to pads
* add input delay constraints, IDELAYs
2018-04-25 13:44:52 +00:00
Robert Jördens f74998a5e0 suservo: move arch logic to top, fix tests 2018-04-23 21:11:26 +00:00
Robert Jördens 4903eb074c suservo: use BUFIO/BUFH for ADC 2018-04-23 18:30:19 +00:00
Robert Jördens e36deab0a8 suservo/adc: try to help vivado extract srls 2018-04-23 18:30:19 +00:00
Robert Jördens 4c1e356f67 suservo: add pads rewiring layer for eems 2018-04-23 18:30:18 +00:00
Robert Jördens d5eea962ec suservo: fix cnv_b diff 2018-04-23 18:30:12 +00:00
Robert Jördens 934c41b90a gateware: add suservo
from
fe4b60b902

m-labs/artiq#788
2018-04-23 18:24:59 +00:00