878ab9a39b
manual: document DDS and SPI RTIO channels
2016-03-10 22:38:49 +08:00
1739e0f2f8
coredevice: put cache into separate file/device
2016-03-10 10:46:19 +08:00
f0b0b1bac7
support for multiple DDS buses (untested)
2016-03-09 17:12:50 +08:00
f33baf339f
pipistrello: drop ttls on pmod, add leds back in
2016-03-08 23:34:51 +01:00
f39208c95a
pipistrello: try with fewer leds/pmod ttl
2016-03-08 22:10:47 +01:00
104d641c59
pipistrello: move the spi channel like kc705
2016-03-08 13:30:05 +01:00
40c1cde2e2
doc: kc705.clock: add spi bus mappings ( closes #321 )
2016-03-08 13:28:32 +01:00
9898cb14db
doc: add pipistrello spi bus
2016-03-08 13:18:55 +01:00
e23e91f8ac
doc: add pipistrello pmod ttl channels
2016-03-08 13:13:33 +01:00
2770d9c729
doc: I2C/QC2
2016-03-05 19:02:03 +08:00
669fbaa4f1
ad53xx->ad5360 and refactor
2016-03-04 00:00:25 +01:00
f754d2c117
Merge branch 'spimaster'
...
* spimaster: (52 commits)
runtime/rtio: rtio_process_exceptional_status() has only one user
coredevice.spi, doc/manual: add spi
kc705: move ttl channels together again, update doc
runtime: rt2wb_input -> rtio_input_data
examples/tdr: adapt to compiler changes
bridge: really fix O/OE
runtime: define constants for ttl addresses
coredevice.ttl: fix sensitivity
bridge: fix ttl o/oe addresses
runtime: refactor ttl*()
rtio: rm rtio_write_and_process_status
coredevice.spi: unused import
rt2wb, exceptions: remove RTIOTimeout
gateware.spi: delay only writes to data register, update doc
nist_clock: disable spi1/2
runtime/rt2wb: use input/output terminology and add (async) input
examples: update device_db for nist_clock spi
gateware.spi: rework wb bus sequence
nist_clock: rename spi*.ce to spi*.cs_n
nist_clock: add SPIMasters to spi buses
...
2016-03-01 22:08:08 +01:00
0456169558
coredevice.spi, doc/manual: add spi
2016-03-01 21:29:09 +01:00
2cc1dfaee3
kc705: move ttl channels together again, update doc
2016-03-01 19:40:32 +01:00
8fa98f6486
doc: use term 'gateware'
...
FPGA newcomers are not used to the term 'bitstream'. To insist that this file
is the result of the gateware compilation and thus the binary FPGA format,
add the term 'gateware' as a prefix.
2016-02-29 20:50:45 +01:00
5fad570f5e
targets/kc705-nist_clock: add clock generator on LA32 for testing purposes
2016-03-01 00:35:26 +08:00
a1e1f2b387
doc: insist that output() must be called on TTLInOut. Closes #297
2016-03-01 00:28:40 +08:00
d0d56bd3fe
doc: update install instructions
2016-03-01 00:19:55 +08:00
5d41113dbc
doc: convert to 'with parallel'
2016-02-23 15:53:41 +08:00
whitequark
51a5910002
Rename 'with parallel' to 'with interleave' ( #265 ).
2016-02-22 13:24:43 +00:00
be6b64a243
doc: fix conda install instructions
2016-02-22 17:52:18 +08:00
14683f297a
doc: remove 'Ubuntu 15.10+/Debian jessie+ specific instructions'. Closes #282
2016-02-22 12:08:22 +08:00
122ddc40aa
doc: add section for RTIO analyzer, mention GtkWave
2016-02-15 23:07:41 +01:00
whitequark
617c416124
Add documentation for rtio_log ( #206 ).
2016-02-15 21:43:02 +00:00
whitequark
3da9bfc704
doc: binutils patch is not needed any more.
2016-02-15 18:25:15 +00:00
b97be9c08d
Merge branch 'newtesting'
2016-02-14 21:30:19 +01:00
b68035d162
manual/installing: refresh
2016-02-10 23:37:21 +01:00
64263b75d0
use https for m-labs.hk
2016-02-10 17:20:29 +01:00
9ca8b48bf9
assume 'import artiq' works before running tests
2016-02-02 21:52:33 +01:00
b7de92e96c
remove pxi6733 support (now lives at https://github.com/m-labs/aq_ni6733
2016-02-02 18:41:57 +01:00
0d7dc7b144
doc: update Underflow catching example
2016-01-25 17:24:00 -07:00
765001054d
artiq.experiment: merge language and coredevice namespaces
...
perl -i -pe 's/^from artiq import \*$/from artiq.experiment import */' your_experiments/*.py
(assuming you skipped the changes form the previous commit)
2016-01-25 17:24:00 -07:00
fbe4d96572
artiq: move namespace artiq.* -> artiq.language.*
...
perl -i -pe 's/^from artiq import \*$/from artiq.language import */' your_experiments/*.py
2016-01-25 17:24:00 -07:00
ea3bb27029
doc/manual: cleanup commented out variables
2016-01-25 17:23:49 -07:00
0bbed9bcb6
RELEASING.rst, doc: show release notes in manual
2016-01-25 17:20:15 -07:00
b56c55a90d
manual: __version__ cleanup
2016-01-25 17:04:56 -07:00
0151ac55ff
ppp: update documentation
2016-01-25 12:29:05 -07:00
fa1afb7dd8
add information about CLOCK hardware
2016-01-20 21:06:02 -05:00
e42fd9ca31
doc: use actual version
2016-01-19 18:25:31 -07:00
cf17be92e3
doc: add artiq_flash
2016-01-18 21:41:42 -07:00
cb2513f8ba
manual: fix coreconfig label
2016-01-13 14:42:05 -07:00
adf552e8d1
manual: artiq.coredevice.runtime_exceptions -> artiq.coredevice.exceptions
2016-01-13 14:40:44 -07:00
e4996fed92
manual/thorlabs_tcube: add note about USB/power sequencing
2016-01-13 14:38:22 -07:00
0b37000874
manual: add core device analyzer TCP port
2016-01-13 14:02:37 -07:00
1543141cee
update copyright year
2016-01-08 11:53:04 +08:00
028ed72b72
doc: typo
2016-01-07 10:06:43 +08:00
0bbe886669
doc/manual: umask warning and openocd installation refinement
2016-01-06 13:12:42 -07:00
358ad2e927
artiq_flash: drop redundant instruction, tweak doc
2016-01-06 11:24:05 -07:00
25ce0928bd
build/doc: simplify proxy bitstream locations
2016-01-05 10:23:50 -07:00
d633c8e1f8
doc: update and cleanup flashing/installing/building
2016-01-05 10:21:34 +08:00
5f3b69dd19
frontend/coreconfig: simplify action names
2015-12-24 18:54:23 +08:00
179c50480f
frontend: split coretool into coreconfig, corelog and coreanalyzer
2015-12-24 18:51:11 +08:00
7548229910
doc/manual/installing: remove outdated note
2015-12-11 10:32:01 +08:00
5e14afde3e
scheduler: use current (last scanned) repo revision instead of HEAD
2015-12-06 19:00:41 +08:00
whitequark
d560b579f0
doc: update mention of int64.
2015-11-24 20:24:38 +08:00
whitequark
d732b6c6d4
doc: nested lists are now supported.
2015-11-24 17:53:40 +08:00
whitequark
c14299dca8
Merge branch 'new-py2llvm'
2015-11-24 03:01:54 +08:00
whitequark
9fc7a42036
pipistrello: expose LED{1..4} as RTIO channels.
2015-11-23 18:26:45 +08:00
Felix Held
8b4b269371
doc/manual/installing: fix a bug, add Fedora specific instructions
...
Signed-off-by: Felix Held <felix-artiq@felixheld.de>
2015-11-21 10:23:58 +08:00
whitequark
51f04f6311
Explicitly use the python3.5 binary everywhere.
2015-11-07 13:39:39 +03:00
b13ee2ed8f
doc: update compilation instructions
2015-11-04 23:38:24 +08:00
73fed53c09
manual: document startup clock and kernel
2015-11-01 00:24:44 +08:00
e6b230b71c
Merge branch 'master' of github.com:m-labs/artiq
2015-10-30 13:41:45 +08:00
2c77c80b4f
master: expose more scheduler APIs to the experiments
2015-10-30 13:41:18 +08:00
whitequark
ff93e3c149
manual: update installing.rst to elaborate QC1/QC2 differences.
2015-10-30 05:07:01 +03:00
whitequark
62419c0952
manual: update installing.rst.
2015-10-30 04:18:42 +03:00
3044a053e1
databases: assume empty dataset_db if file not present. Closes #156
2015-10-24 10:15:20 +08:00
whitequark
f3e61e265c
conda: move everything except artiq to conda-recipes ( closes #138 ).
2015-10-16 07:06:22 +03:00
cbda753f44
master: TCP server for remote logging
2015-10-16 00:53:35 +08:00
ef487ee8b0
doc: more updates for dataset API
2015-10-13 18:45:04 +08:00
fc4791bbbe
doc: new dataset API
2015-10-13 18:11:17 +08:00
ceb18d05b3
manual/management: add warning about setups that resolve the current hostname to localhost. closes #134
2015-10-13 01:47:18 +08:00
5f89d1a78f
doc: document core device driver. Closes #119
2015-10-06 18:12:57 +08:00
50a5a3baf0
environment: attr_* -> setattr_*
2015-10-04 00:18:21 +08:00
125503139e
remove workaround for Python bug in asyncio process.wait(). Requires Python 3.5. Closes #58
2015-10-03 14:33:18 +08:00
cd3107ba75
do not use deprecated asyncio.JoinableQueue
2015-10-03 13:59:18 +08:00
01416bb0be
copyright: claim contributions
...
These are contributions of >= 30% or >= 20 lines (half-automated).
I hereby resubmit all my previous contributions to the ARTIQ project
under the following terms:
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/ >.
Closes #130
Signed-off-by: Robert Jordens <jordens@gmail.com>
2015-09-06 16:08:57 -06:00
2bd27a3170
update copyright/license
2015-09-05 15:50:34 -06:00
Yann Sionneau
f602928e89
manual: ARTIQ requires python 3.4.3 or above
2015-09-01 16:46:12 +02:00
Yann Sionneau
2056831c05
manual: add install instructions for pygit2
2015-08-28 17:50:39 +02:00
1cace1cd91
style
2015-08-28 16:30:33 +08:00
031d8d0890
doc/manual: add note about bidirectional TTL in tutorial
2015-08-28 16:29:56 +08:00
Yann Sionneau
241b7651a2
manual: fix typo in package name
2015-08-28 09:51:53 +02:00
Yann Sionneau
4d84ec7742
update lx45 bscan bitstream url which wget could not fetch on some systems
2015-08-27 21:38:00 +02:00
Yann Sionneau
4cb0d4589e
manual: fix some typos
2015-08-26 16:14:16 +02:00
8aec02dfcf
Merge branch 'master' of github.com:m-labs/artiq
2015-08-26 20:43:12 +08:00
2c893ba0a2
doc/manual: add results to mgmt tutorial
2015-08-26 20:40:37 +08:00
947acb1f90
manual: management system tutorial, Git integration
2015-08-26 20:23:50 +08:00
Yann Sionneau
7b0b1d6860
manual: Windows (32 and 64-bit) users should install 32-bit miniconda/anaconda
2015-08-26 14:22:13 +02:00
d4f42e33e6
doc: clarify hw support
2015-08-21 13:33:23 +08:00
ac5dd0a7e5
doc: scans
2015-08-21 13:32:53 +08:00
c3f3763af1
doc: units
2015-08-18 23:31:06 +08:00
9f0ada49e5
doc: environment
2015-08-18 23:30:50 +08:00
c97c6e2b9a
doc/ndsp_reference: reorganize
2015-08-18 22:34:22 +08:00
178816243c
doc/core_device: update, add KC705 QC1 TTL table
2015-08-18 16:04:27 +08:00
Yann Sionneau
a0f1b02eb5
Revert "manual: llvmlite-artiq conda package needs a recent libstdc++6"
...
This reverts commit 8669f1d61d
2015-08-17 17:50:57 +02:00
cd199f16ec
doc: add note about setting core device IP
2015-08-17 23:41:55 +08:00
fd3fefec52
add InfluxDB bridge
2015-08-17 15:44:40 +08:00
Yann Sionneau
8669f1d61d
manual: llvmlite-artiq conda package needs a recent libstdc++6
2015-08-14 21:44:28 +02:00
12b3157009
doc: add precision about Git commit management
2015-08-14 10:37:45 +08:00
