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artiq
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pipistrello: try with fewer leds/pmod ttl

release-1
Robert Jördens 2016-03-08 22:10:47 +01:00
parent 0d431cb019
commit f39208c95a
2 changed files with 7 additions and 16 deletions
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7
artiq/gateware/targets/pipistrello.py
View File

@ -196,15 +196,14 @@ trce -v 12 -fastpaths -tsi {build_name}.tsi -o {build_name}.twr {build_name}.ncd
self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy, ofifo_depth=4))
for led_number in range(4):
for led_number in range(2):
phy = ttl_simple.Output(platform.request("user_led", led_number))
self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy, ofifo_depth=4))
spi_pins = self.platform.request("pmod_extended_spi", 0)
for i, p in enumerate((spi_pins.int, spi_pins.rst,
spi_pins.d0, spi_pins.d1)):
for i, p in enumerate((spi_pins.int, spi_pins.rst)):
phy = ttl_simple.Inout(p)
self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=4,
@ -220,7 +219,7 @@ trce -v 12 -fastpaths -tsi {build_name}.tsi -o {build_name}.twr {build_name}.ncd
self.submodules += phy
self.config["RTIO_FIRST_SPI_CHANNEL"] = len(rtio_channels)
rtio_channels.append(rtio.Channel.from_phy(
phy, ofifo_depth=64, ififo_depth=64))
phy, ofifo_depth=256, ififo_depth=256))
self.config["RTIO_DDS_CHANNEL"] = len(rtio_channels)
self.config["DDS_CHANNEL_COUNT"] = 8

16
doc/manual/core_device.rst
View File

@ -128,19 +128,11 @@ When plugged to an adapter, the NIST QC1 hardware can be used. The TTL lines are
+--------------+------------+--------------+
| 19 | USER_LED_2 | Output |
+--------------+------------+--------------+
| 20 | USER_LED_3 | Output |
| 20 | PMOD_4 | Input+Output |
+--------------+------------+--------------+
| 21 | USER_LED_4 | Output |
| 21 | PMOD_5 | Input+Output |
+--------------+------------+--------------+
| 22 | PMOD_4 | Input+Output |
+--------------+------------+--------------+
| 23 | PMOD_5 | Input+Output |
+--------------+------------+--------------+
| 24 | PMOD_6 | Input+Output |
+--------------+------------+--------------+
| 25 | PMOD_7 | Input+Output |
+--------------+------------+--------------+
| 26 | TTL15 | Clock |
| 22 | TTL15 | Clock |
+--------------+------------+--------------+
The input only limitation on channels 0 and 1 comes from the QC-DAQ adapter. When the adapter is not used (and physically unplugged from the Pipistrello board), the corresponding pins on the Pipistrello can be used as outputs. Do not configure these channels as outputs when the adapter is plugged, as this would cause electrical contention.
@ -153,5 +145,5 @@ Interface Type 2 (SPI) and 2A (expanded SPI):
+--------------+--------+--------+--------+--------+
| RTIO channel | CS_N | MOSI | MISO | CLK |
+==============+========+========+========+========+
| 27 | PMOD_0 | PMOD_1 | PMOD_2 | PMOD_3 |
| 23 | PMOD_0 | PMOD_1 | PMOD_2 | PMOD_3 |
+--------------+--------+--------+--------+--------+