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artiq
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pipistrello: drop ttls on pmod, add leds back in

release-1
Robert Jördens 2016-03-08 23:34:51 +01:00
parent f39208c95a
commit f33baf339f
2 changed files with 3 additions and 9 deletions
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8
artiq/gateware/targets/pipistrello.py
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@ -196,19 +196,13 @@ trce -v 12 -fastpaths -tsi {build_name}.tsi -o {build_name}.twr {build_name}.ncd
self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy, ofifo_depth=4))
for led_number in range(2):
for led_number in range(4):
phy = ttl_simple.Output(platform.request("user_led", led_number))
self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy, ofifo_depth=4))
spi_pins = self.platform.request("pmod_extended_spi", 0)
for i, p in enumerate((spi_pins.int, spi_pins.rst)):
phy = ttl_simple.Inout(p)
self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=4,
ofifo_depth=4))
self.config["RTIO_REGULAR_TTL_COUNT"] = len(rtio_channels)
phy = ttl_simple.ClockGen(platform.request("ttl", 15))

4
doc/manual/core_device.rst
View File

@ -128,9 +128,9 @@ When plugged to an adapter, the NIST QC1 hardware can be used. The TTL lines are
+--------------+------------+--------------+
| 19 | USER_LED_2 | Output |
+--------------+------------+--------------+
| 20 | PMOD_4 | Input+Output |
| 20 | USER_LED_3 | Output |
+--------------+------------+--------------+
| 21 | PMOD_5 | Input+Output |
| 21 | USER_LED_4 | Output |
+--------------+------------+--------------+
| 22 | TTL15 | Clock |
+--------------+------------+--------------+