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doc: kc705.clock: add spi bus mappings (closes #321)

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Robert Jördens 2016-03-08 13:28:32 +01:00
parent 9898cb14db
commit 40c1cde2e2
1 changed files with 14 additions and 0 deletions
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14
doc/manual/core_device.rst
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@ -75,6 +75,20 @@ With the CLOCK hardware, the TTL lines are mapped as follows:
| 21 | LA32_P | Clock |
+--------------------+-----------------------+--------------+
The board has RTIO SPI buses mapped as follows:
+--------------+-------------+-------------+-----------+------------+
| RTIO channel | CS_N | MOSI | MISO | CLK |
+==============+=============+=============+===========+============+
| 22 | AMS101_CS_N | AMS101_MOSI | | AMS101_CLK |
+--------------+-------------+-------------+-----------+------------+
| 23 | SPI0_CS_N | SPI0_MOSI | SPI0_MISO | SPI0_CLK |
+--------------+-------------+-------------+-----------+------------+
| 24 | SPI1_CS_N | SPI1_MOSI | SPI1_MISO | SPI1_CLK |
+--------------+-------------+-------------+-----------+------------+
| 25 | SPI2_CS_N | SPI2_MOSI | SPI2_MISO | SPI2_CLK |
+--------------+-------------+-------------+-----------+------------+
NIST QC2
++++++++