Paweł
|
44c7a028cb
|
Added second argument to DIO.add_STD in master and satellite variant of kasli (now builds properly)
|
2018-05-30 22:49:40 +08:00 |
Sebastien Bourdeauducq
|
ad099edf63
|
kasli: integrate grabber
|
2018-05-28 22:43:40 +08:00 |
Robert Jördens
|
b20a8c86b0
|
kasli: don't bother with grabber ttls for now
not used on target cameras
|
2018-05-28 07:31:00 +02:00 |
Sebastien Bourdeauducq
|
80c69da17e
|
eem: add Grabber IOs and CC
|
2018-05-28 11:16:23 +08:00 |
Robert Jördens
|
b09d07905c
|
kasli: add LUH/PTB/HUB variants
and refactor/simplify variant selection
|
2018-05-27 18:33:27 +00:00 |
Sebastien Bourdeauducq
|
19efd8b13e
|
kasli: refactor EEM code
|
2018-05-24 18:41:54 +08:00 |
Sebastien Bourdeauducq
|
4e5fe672e7
|
kasli: add tester target
|
2018-05-21 17:43:39 +08:00 |
Sebastien Bourdeauducq
|
72aef5799e
|
kasli/ustc: use TTLOut
|
2018-05-18 22:55:28 +08:00 |
Sebastien Bourdeauducq
|
b10d3ee4b4
|
make RTIO clock switch optional and simplify
Kasli no longer has an internal RTIO clock.
Switching clocks dynamically is no longer supported.
|
2018-05-18 17:41:34 +08:00 |
Sebastien Bourdeauducq
|
8a988d0feb
|
kasli: remove leftover debug print
|
2018-05-18 17:25:23 +08:00 |
Sebastien Bourdeauducq
|
37bd0c2566
|
kasli: add USTC target
|
2018-05-18 16:15:07 +08:00 |
Robert Jördens
|
27f975e7bb
|
kasli: eem DifferentialInputs need DIFF_TERM
cleanup some formatting on the way
|
2018-05-14 12:26:49 +00:00 |
Sebastien Bourdeauducq
|
8c1390e557
|
kasli: use 62.5MHz clock for siphaser reference (#999)
|
2018-05-12 22:58:03 +08:00 |
Robert Jördens
|
7d4a103a43
|
opticlock, suservo: set default kasli hw_rev
|
2018-05-07 09:07:18 +02:00 |
Robert Jördens
|
5a683ddd1f
|
Revert "kasli: force hw_rev for the different targets"
This reverts commit 17d7d7856a .
Would require filtering it in misoc or better
removing the argparse option.
|
2018-04-28 23:24:41 +02:00 |
Robert Jördens
|
17d7d7856a
|
kasli: force hw_rev for the different targets
|
2018-04-28 21:30:29 +02:00 |
Robert Jördens
|
307cd07b9d
|
suservo: lots of gateware/ runtime changes
tested/validated:
* servo enable/disable
* dds interface, timing, io_update, mask_nu
* channel control (en_out, en_iir, profile)
* profile configuration (coefficients, delays, offsets, channel)
* adc timings and waveforms measured
* asf state readback
* adc readback
individual changes below:
suservo: correct rtio readback
suservo: example, device_db [wip]
suservo: change rtio channel layout
suservo: mem ports in rio domain
suservo: sck clocked from rio_phy
suservo: cleanup, straighten out timing
suservo: dds cs polarity
suservo: simplify pipeline
suservo: drop unused eem names
suservo: decouple adc SR from IIR
suservo: expand coredevice layer
suservo: start the correct stage
suservo: actually load ctrl
suservo: refactor/tweak adc timing
suservo: implement cpld and dds init
|
2018-04-27 13:50:26 +02:00 |
Robert Jördens
|
f9b2c32739
|
suservo: add pgia spi channel
|
2018-04-25 17:14:25 +00:00 |
Robert Jördens
|
37c186a0fc
|
suservo: refactor, constrain
* remove DiffMixin, move pad layout handling to pads
* add input delay constraints, IDELAYs
|
2018-04-25 13:44:52 +00:00 |
Robert Jördens
|
d0258b9b2d
|
suservo: set input delays
|
2018-04-24 15:30:25 +00:00 |
Robert Jördens
|
3942c2d274
|
suservo: fix clkout cd drive
|
2018-04-24 10:18:32 +00:00 |
Robert Jördens
|
f74998a5e0
|
suservo: move arch logic to top, fix tests
|
2018-04-23 21:11:26 +00:00 |
Robert Jördens
|
929ed4471b
|
kasli/SUServo: use suservo, implement urukul_qspi
m-labs/artiq#788
|
2018-04-23 18:30:18 +00:00 |
Sebastien Bourdeauducq
|
eac447278f
|
kasli: add MITLL variant
|
2018-04-17 19:00:11 +08:00 |
Sebastien Bourdeauducq
|
756e120c27
|
kasli/sysu: add comments
|
2018-04-17 18:46:55 +08:00 |
Sebastien Bourdeauducq
|
493d2a653f
|
siphaser: add false path between sys_clk and mmcm_freerun_output
|
2018-03-29 10:55:41 +08:00 |
Sebastien Bourdeauducq
|
4229c045f4
|
kasli: fix DRTIO master clock constraint
|
2018-03-29 10:20:31 +08:00 |
Sebastien Bourdeauducq
|
605292535c
|
kasli: ignore OSERDESE2->ISERDESE2 timing path on DRTIO targets as well
|
2018-03-29 10:12:02 +08:00 |
Robert Jördens
|
770b0a7b79
|
novogorny: conv -> cnv
* parity with sampler
* also add novogorny device to opticlock
|
2018-03-21 18:38:42 +00:00 |
Robert Jördens
|
1afce8c613
|
kasli: simplify single eem pin formatting
|
2018-03-21 13:08:42 +01:00 |
Robert Jördens
|
d48b8f3086
|
kasli: fix sampler sdr/cnv pins
|
2018-03-21 09:28:00 +00:00 |
Robert Jördens
|
1fb5907362
|
kasli: add SUServo variant (Sampler-Urukul Servo)
|
2018-03-21 08:53:26 +00:00 |
Robert Jördens
|
f74d5772f4
|
sampler: add wide eem definition
|
2018-03-21 08:53:26 +00:00 |
Thomas Harty
|
37d431039d
|
Fix typos.
Reduce ififo depth to 4 for Zotino.
|
2018-03-19 09:42:18 +00:00 |
Thomas Harty
|
c4fa44bc62
|
Add Zotino and Sampler functions to Kasli. Add Zotino to Kasli EEM 7 on OptiClock.
|
2018-03-18 00:25:43 +00:00 |
Sebastien Bourdeauducq
|
fc3d97f1f7
|
drtio: remove spurious multichannel transceiver clock constraints
They used to cause (otherwise harmless) Vivado critical warnings.
|
2018-03-09 22:46:27 +08:00 |
Sebastien Bourdeauducq
|
caf7b14b55
|
kasli: generate fine RTIO clock in DRTIO targets, separate RTIO channel code
|
2018-03-09 22:36:16 +08:00 |
Robert Jördens
|
82831a85b6
|
kasli/opticlock: add eem6 phys
|
2018-03-07 21:32:59 +01:00 |
Sebastien Bourdeauducq
|
916197c4d7
|
siphaser: cleanup
|
2018-03-07 11:15:44 +08:00 |
Sebastien Bourdeauducq
|
c34d00cbc9
|
drtio: implement Si5324 phaser gateware and partial firmware support
|
2018-03-07 10:57:30 +08:00 |
Robert Jördens
|
62af7fe2ac
|
Revert "kasli/opticlock: use plain ttls for channels 8-23"
This reverts commit bd5c222569eb68d624a5ac1e9f2542f6ee553f83.
No decrease in power consumption or improvement in timing.
|
2018-03-06 14:27:19 +01:00 |
Robert Jördens
|
fd3cdce59a
|
kasli/opticlock: use plain ttls for channels 8-23
|
2018-03-06 14:27:19 +01:00 |
Robert Jördens
|
956098c213
|
kasli: add second urukul, make clk_sel drive optional
|
2018-03-06 14:26:27 +01:00 |
Robert Jördens
|
07de7af86a
|
kasli: make second eem optional in urukul
|
2018-03-06 14:26:26 +01:00 |
Sebastien Bourdeauducq
|
a9daaad77b
|
kasli: add SYSU variant and device_db
|
2018-03-02 14:44:31 +08:00 |
Sebastien Bourdeauducq
|
386aa75aaa
|
kasli: control SFP1 and SFP2 LEDs in DRTIO satellite to match master
|
2018-02-27 23:18:18 +08:00 |
Sebastien Bourdeauducq
|
5d81877b34
|
kasli: implement multi-link DRTIO on SFP1 and SFP2 of master
|
2018-02-27 23:15:20 +08:00 |
Sebastien Bourdeauducq
|
e565d3fa59
|
kasli: add analyzer and RTIO log to DRTIO master target
|
2018-02-27 18:09:07 +08:00 |
Robert Jördens
|
1452cd7447
|
novogorny: add coredevice driver and test with Kasli
m-labs/artiq#687
|
2018-02-22 17:19:51 +01:00 |
Robert Jördens
|
3b7971d15d
|
kasli: spelling
|
2018-02-22 17:19:51 +01:00 |