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mirror of https://github.com/m-labs/artiq.git synced 2024-12-29 05:03:34 +08:00

kasli: force hw_rev for the different targets

This commit is contained in:
Robert Jördens 2018-04-28 21:30:29 +02:00
parent f7e08ec46b
commit 17d7d7856a

View File

@ -388,7 +388,7 @@ class Opticlock(_StandaloneBase):
Opticlock extension variant configuration
"""
def __init__(self, **kwargs):
_StandaloneBase.__init__(self, **kwargs)
_StandaloneBase.__init__(self, hw_rev="v1.0", **kwargs)
self.config["SI5324_AS_SYNTHESIZER"] = None
# self.config["SI5324_EXT_REF"] = None
@ -493,7 +493,7 @@ class SUServo(_StandaloneBase):
SUServo (Sampler-Urukul-Servo) extension variant configuration
"""
def __init__(self, **kwargs):
_StandaloneBase.__init__(self, **kwargs)
_StandaloneBase.__init__(self, hw_rev="v1.1", **kwargs)
self.config["SI5324_AS_SYNTHESIZER"] = None
# self.config["SI5324_EXT_REF"] = None
@ -605,7 +605,7 @@ class SUServo(_StandaloneBase):
class SYSU(_StandaloneBase):
def __init__(self, **kwargs):
_StandaloneBase.__init__(self, **kwargs)
_StandaloneBase.__init__(self, hw_rev="v1.1", **kwargs)
self.config["SI5324_AS_SYNTHESIZER"] = None
self.config["RTIO_FREQUENCY"] = "125.0"
@ -659,10 +659,8 @@ class SYSU(_StandaloneBase):
class MITLL(_StandaloneBase):
def __init__(self, hw_rev=None, **kwargs):
if hw_rev is None:
hw_rev = "v1.1"
_StandaloneBase.__init__(self, hw_rev=hw_rev, **kwargs)
def __init__(self, **kwargs):
_StandaloneBase.__init__(self, hw_rev="v1.1", **kwargs)
self.config["SI5324_AS_SYNTHESIZER"] = None
self.config["RTIO_FREQUENCY"] = "125.0"