2
0
mirror of https://github.com/m-labs/artiq.git synced 2025-02-02 22:00:20 +08:00
Commit Graph

15 Commits

Author SHA1 Message Date
f8dba7ae35 rtio: use BlindTransfer from Migen 2019-07-05 18:46:18 +08:00
8caea0e6d3 gateware,runtime: optimize RTIO kernel interface further
* now pinning (TODO: atomicity)
* for inputs, merge request and timeout registers
2018-11-08 18:29:24 +08:00
edf403b837 drtio: improve error reporting 2018-09-12 15:44:34 +08:00
5f20d79408 drtio: add timeout on satellite internal CRI buffer space request 2018-09-05 14:12:11 +08:00
f3fe818049 rtio: refactor TSC to allow sharing between cores 2018-09-03 09:48:12 +08:00
ce6e390d5f drtio: expose internal satellite CRI 2018-08-30 12:41:09 +08:00
1d081ed6c2 drtio: print diagnostic info on satellite write underflow (#947) 2018-03-12 23:41:19 +08:00
8bd15d36c4 drtio: fix error CSR edge detection (#947) 2018-03-08 16:28:25 +08:00
6c049ad40c rtio: report channel numbers in asynchronous errors 2017-09-29 16:32:57 +08:00
5437f0e3e3 rtio: make sequence errors consistently asychronous 2017-09-29 14:40:06 +08:00
20d79c930c drtio: use SED and input collector 2017-09-24 12:23:47 +08:00
5e3aef45dc drtio: support collision/replace + detect sequence errors at satellite 2017-04-06 01:06:56 +08:00
db3118b916 drtio: use BlindTransfer for error reporting 2017-04-03 00:18:07 +08:00
008678b741 drtio: add infrastructure for reporting busy/collision errors 2017-04-02 23:45:55 +08:00
0a687b7902 drtio: report satellite errors through firmware 2017-04-01 12:18:00 +08:00