srenblad
/
artiq
forked from M-Labs/artiq
1
0
Fork 0
Code Pull Requests Activity
6,277 Commits 63 Branches 34 Tags 19 MiB
Commit Graph

6277 Commits

Author SHA1 Message Date
Robert Jördens f522e211ba tests: add Urukul-AD9910 HITL unittests including SYNC 
for #1143

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:37:06 +01:00
Robert Jördens 9fb850ae75 ad9910: add init bit explanation 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:37:02 +01:00
Robert Jördens bc04da15c5 test: add Urukul CPLD HITL tests 
for #1143

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:37:00 +01:00
Robert Jördens 141cc7d99f ad9910: fiducial timestamp for tracking phase mode 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:36:58 +01:00
Robert Jördens 2f6d3f79ff ad9910: add phase modes 
* simplified and cross-referenced the explanation of the different
  phase modes.
* semantically and functionally merged absolute and tracking/coherent
  phase modes.
* simplified numerics to calculate phase correction
* added warning about possible inconsistency with DMA and default
  phase mode
* restricted __all__ imports
* moved continuous/relative phase offset tracking from an instance
  variable to a "handle" returned by set()/set_mu() in order to avoid
  state inconsistency with DMA (#1113 #1115)

for #1143

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:36:55 +01:00
Robert Jördens d3ad2b7633 ad9910: fix pll timeout loop 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:36:53 +01:00
Robert Jördens 4269d5ad5c tester: add urukul sync 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:36:52 +01:00
Robert Jördens 60d3bc63a7 ptb: back out urukul-sync 
... for backwards compatibility.

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:36:50 +01:00
Robert Jördens 06139c0f4d ad9910: add IO_UPDATE alignment and tuning 
for #1143

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:36:48 +01:00
Robert Jördens 1066430fa8 urukul: set up sync_in generator 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:36:46 +01:00
Robert Jördens 4bbd833cfe ad9910: add io_update alignment measurement 
for #1143

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:36:44 +01:00
Robert Jördens 7b92282012 ad9910: add docs for sync tuning, refactor 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:36:42 +01:00
Robert Jördens 8a47a6b2fb ad9910: disable sync_clk output 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:36:40 +01:00
Robert Jördens 65e2ebf960 ad9910: add sync delay control, auto tuning 
* expose multi device sync functionality
* sync delay configuration interface
* auto-tuning of sync delay from device_db seed

for #1143

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:36:37 +01:00
Robert Jördens 8dbf5f87fd ad9910: simplify io_update pulsing on init, set_mu 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:36:35 +01:00
Robert Jördens 0b3b07a7da ad9910: add power down method 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:36:34 +01:00
Robert Jördens 3538444876 urukul: add sync_in to eem0-7 name 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:36:32 +01:00
Robert Jördens 0433e8f4fe urukul: add sync_in generator 
for #1143

Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:36:30 +01:00
Robert Jördens f62c1ff0bb TTLClockGen: expose acc_width 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:36:27 +01:00
Robert Jördens f755a4682a device_db_ptb: fix zotino clr 
Signed-off-by: Robert Jördens <rj@quartiq.de>
 2018-11-05 19:36:24 +01:00
Robert Jördens 89a961fb00 urukul, ad9912, ad9910: expose CFG RF switch better 
* conincident setting of multiple switches
* per channel setting
 2018-10-24 13:04:46 +02:00
Drew 4e04b6b4dd [template]: fix 3_question.md template use of ":" 
Question.md didn't display on ARTIQ new issue page.
Solution: Cannot use ":" in Markdown header

Signed-off-by: Drew Risinger <drewrisinger@users.noreply.github.com>
 2018-10-23 23:01:58 +08:00
Drew 761d30d998 [template]: Reorder pull request template 
PR template wasn't in a logical order, hard for maintainers to read. Reorganized.
Fix directory where docs are built from.

Signed-off-by: Drew Risinger <drewrisinger@users.noreply.github.com>
 2018-10-23 23:01:22 +08:00
Sebastien Bourdeauducq 0b43ec4719 conda: bump migen 2018-10-21 14:33:14 +08:00
Sebastien Bourdeauducq 48a142ed63 use FutureWarning instead of DeprecationWarning 
DeprecationWarning is disabled by default and too easy to ignore.
 2018-10-21 12:14:51 +08:00
Sebastien Bourdeauducq 9793632282 enviromnment: rename 'save' in set_dataset to 'archive'. Closes #1171 2018-10-21 12:08:34 +08:00
Marius Weber 029f9d983a Tpz fixes (#1178) 
*   flake8
*   fix TPZ constructor after move to asyncio
*   Tcube fix docummentation in set_channel_enable_state
 2018-10-20 20:49:15 +08:00
Drew a84c6c6d74 Add issue & pull request templates (#1163) 2018-10-20 20:43:19 +08:00
Sebastien Bourdeauducq c52a6ca8e9 typo (#1179) 2018-10-20 20:40:07 +08:00
Florent Kermarrec 3318925f4e firmware/liboard_misoc/sdram: use similar loops on read_level_scan and read_level for consistent results 2018-10-16 09:40:39 +02:00
Sebastien Bourdeauducq 6357a50d33 kasli: update nudt variant 2018-10-15 18:04:57 +08:00
David Nadlinger e3cfbfed06 master: Add minimal docstring to worker_impl [nfc] 2018-10-14 10:41:32 +08:00
David Nadlinger 64b9a377da master: Factor RIDCounter out into own module, explain worker_db module [nfc] 
The docstrings are quite minimal still, but should already
help with navigating the different layers when getting
accustomed with the code base.

RIDCounter was moved to its own module, as it isn't really
related to the other classes (used from master only).
 2018-10-14 10:41:32 +08:00
David Nadlinger 4641ddf002 master: Remove unused import [nfc] 2018-10-14 10:41:32 +08:00
Robert Jördens 661dd00c4c ad9912: phase offset is 14 bit LSB aligned 
c.f. sinara-hw/Urukul#15
 2018-10-11 15:16:08 +02:00
hartytp 08074d5275 Urukul: add support for hardware v1.3 clocking options 2018-10-10 09:26:35 +02:00
Sebastien Bourdeauducq 469a66db61 drtio: monitor RTIOClockMultiplier PLL (#1155) 
Debugging by Tom Harty
 2018-10-08 14:50:02 +02:00
Robert Jördens 9cf88329b2 CONTRIBUTING: correct default licensing 2018-10-08 11:20:37 +02:00
hartytp 1a1b454ed9 Urukul: flake8 (NFC) 2018-10-08 10:09:49 +01:00
Robert Jördens 5de319d76a bit2bin: don't print string terminator 2018-10-08 10:13:03 +02:00
hartytp 9a509e5070 Zotino: increase delay after register read in init method to avoid underflows 2018-10-06 21:45:17 +08:00
Sebastien Bourdeauducq 86fe6b0594 kasli: add NUDT variant 2018-10-04 23:20:09 +08:00
Sebastien Bourdeauducq a89bd6b684 kasli: swap Urukul EEMs for Tester 
Updated to Urukul 1.3.
 2018-10-04 23:19:31 +08:00
Robert Jördens d0ee2c2955 opticlock: external 100 MHz 2018-09-28 19:05:18 +02:00
Drew Risinger 0fef2afccb make.bat: fix typo 2018-09-27 23:22:19 +08:00
Drew Risinger fad7128a52 Create Docs Makefile for Windows. #1159 
Allows building Sphinx documentation on Windows,
(not just Linux as previously).
Closes #1159.
 2018-09-27 23:22:19 +08:00
Sebastien Bourdeauducq 3b3fddb5a4 kasli: add mitll2 2018-09-27 23:21:52 +08:00
Sebastien Bourdeauducq 998a468983 examples: add grabber to device databases 2018-09-27 16:09:25 +08:00
Sebastien Bourdeauducq c71e442929 documentation improvements 
Based on PR #1101 by @drewrisinger
 2018-09-26 12:12:37 +08:00
Chris Ballance 53c7a5f2c6 dashboard: fix TTL moninj level display 2018-09-26 10:32:08 +08:00