Commit Graph

5298 Commits

Author SHA1 Message Date
14e4e1cf22 Hack-patch Sphinx so that ARTIQ-Python types are correctly printed.
Modification proposed to Sphinx but my issue is getting ignored.

Closes #741
2017-11-25 14:45:31 +08:00
7f15f50878 coredevice/ad9912: add [untested, wip] 2017-11-24 18:47:46 +01:00
280392708d sawg: fix typo 2017-11-22 20:06:02 +08:00
29181b1586 artiq_influxdb: use aiohttp.ClientSession. Closes #829 2017-11-22 17:31:09 +08:00
whitequark
26fdd42f8f runtime: update smoltcp. 2017-11-22 08:09:06 +00:00
ecfe2e40ee sayma_amc_standalone: rtio channels for both sawg groups 2017-11-19 18:32:42 +01:00
d1a7c1c3a1 sayma_amc_standalone: connect sawg to jesd again 2017-11-19 14:36:20 +01:00
Florent Kermarrec
dfdd2dd9e6 gateware/targets/sayma_amc_standalone: revert self.add_wb_slave on serwb 2017-11-19 09:01:20 +01:00
Florent Kermarrec
cd83b71d92 gateware/targets/sayma_amc_standalone: serwb working, need fixing on AD9154 data mapping 2017-11-18 18:10:28 +01:00
Florent Kermarrec
a3383c340c firmware/satman/lib.rs: has_serwb_phy to has_serwb_phy_amc 2017-11-18 18:09:35 +01:00
Florent Kermarrec
39a8fc682d artiq/firmware/libboard/hmc830_7043.rs: some cleanup, don't use hmc830 for now 2017-11-18 18:08:31 +01:00
Florent Kermarrec
f003566e52 serwb: fix rx_delay_inc on ultrascale, this was the issue serwb issue...
rx_delay_inc and rx_delay_ce were set for only one cycle, on ultrascale, these signals are translated to serwb_serdes_5x clock domain and we now set rx_delay_inc always to 1 (MultiReg), rx_delay_ce for one cycle (PulseSynchronizer)
2017-11-18 18:01:46 +01:00
Florent Kermarrec
1b976bfa4d gateware/serwb/kusphy: use AsyncResetSynchronizer on cd_serwb_serdes_5x 2017-11-18 17:57:11 +01:00
Florent Kermarrec
aff1609a53 firmware/libboard: use correct jesd clocking 2017-11-10 10:56:45 +01:00
Florent Kermarrec
d90d624877 firmware/libboard/serwb: revert init reset, show delay 2017-11-10 10:53:20 +01:00
Florent Kermarrec
464b24a608 gateware/targets/sayma_amc: integrate ad9154 correctly (add crg, use cpll instead of qpll, use correct clocking) and cleanup serwb constraints. 2017-11-10 10:48:32 +01:00
Florent Kermarrec
278c739d30 gateware/targets/sayma_rtm: add dynamic clock mux, cleanup serwb clock constraints 2017-11-10 10:39:47 +01:00
Florent Kermarrec
48bfaec8d3 gateware/serwb/phy: remove unnecessary rx_dly_rst (use wrap-around), fix typo & pep8 2017-11-10 10:37:08 +01:00
Florent Kermarrec
59be095512 gateware/serwb/kusphy: use locally inverted clk_b on iserdese3 2017-11-10 10:35:48 +01:00
Florent Kermarrec
db82b11f29 gateware/serwb/core: cleanup and increase fifo depth 2017-11-10 10:33:39 +01:00
5dc131636d artiq_flash: adapt to bit2bin 2017-11-09 18:10:15 +01:00
4880e4225d bit2bin: cleanup 2017-11-09 13:00:04 +01:00
Florent Kermarrec
76ddb063cf gateware/targets/sayma: get hmc830/7043 spi working (still need to test clock generation) 2017-11-06 12:08:28 +01:00
whitequark
fcd660d682 runtime: remove accidentally deleted code. 2017-11-03 16:10:59 +00:00
whitequark
dfb2fe0b80 runtime: allow #[cfg(not(has_ethmac))] builds. 2017-11-03 16:09:22 +00:00
whitequark
4835431ac3 runtime: allow #[cfg(not(has_kernel_cpu))] builds. 2017-11-03 16:04:17 +00:00
whitequark
ad8fcb8b86 runtime: has_rtio -> has_rtio_core.
has_rtio is the cfg for the kernel CPU, has_rtio_core is the one
for the comms CPU.

Also remove a few useless #[cfg]s.
2017-11-03 15:59:59 +00:00
whitequark
2404a0d8c8 runtime: allow #[cfg(not(has_rtio))] builds. 2017-11-03 15:49:30 +00:00
Florent Kermarrec
b3e920b3c8 firmware/libboard/serwb: fix init 2017-11-03 12:16:16 +01:00
Florent Kermarrec
5bd1e43ced gateware/serwb: cleanup imports, use buffered SyncFIFO in EtherboneRecordSender 2017-11-03 12:15:14 +01:00
0d8bad5128 runtime: fix rtio::log 2017-11-03 09:25:37 +08:00
4387b0be1e clean up rtio_log 2017-11-03 00:52:53 +08:00
5a972907f3 conda: update misoc 2017-11-02 12:27:46 +08:00
62320432a5 artiq_flash: fix sayma amc tap/pld index 2017-11-01 14:45:07 +01:00
e16ab69f01 DEVELOPER_NOTES: fix syntax 2017-11-01 14:37:30 +01:00
33d339947c doc: add information on how to connect Zotino 2017-11-01 20:20:42 +08:00
bfd36e7340 artiq_flash: update for Sayma OpenOCD changes 2017-11-01 20:11:18 +08:00
99b99d436d DEVELOPER_NOTES: add instructions to select Sayma 2017-11-01 17:35:03 +08:00
4a57b52241 artiq_flash: add preinit-command option 2017-11-01 17:34:10 +08:00
6089d44fd0 artiq_flash: update Sayma flash proxy bitstream name 2017-11-01 14:57:30 +08:00
8407b2c400 examples/ad5360: set FMC DIO directions 2017-10-31 23:15:03 +08:00
d80cf8d59d kc705: add TTLs and shift register driver for FMC DIO 2017-10-31 23:14:39 +08:00
4deeccbead coredevice: add shift register driver 2017-10-31 23:13:06 +08:00
35fd15db4a DEVELOPER_NOTES: add board lock script 2017-10-31 22:53:39 +08:00
f3f83174b1 test: check that DMA can underflow 2017-10-31 00:10:13 +08:00
0695afec37 examples/dma_blink: use handle 2017-10-31 00:07:34 +08:00
415fa00846 test: relax rtio test_loopback 2017-10-30 23:07:54 +08:00
20a5f095f8 test: use longer DMA sequence when playing it back repeatedly
The CPU has to keep up.
2017-10-30 23:06:38 +08:00
9bf189ca10 test: relax timing requirements when not using DMA handle
core_dma.playback() without handle incurs a round-trip with the comms
CPU and should not be used in critical real-time sections.

Closes #834.
2017-10-30 22:57:12 +08:00
cd51bd3980 conda: fix misoc version 2017-10-30 18:37:20 +08:00