forked from M-Labs/artiq
gateware/serwb: cleanup imports, use buffered SyncFIFO in EtherboneRecordSender
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@ -503,7 +503,8 @@ class _EtherboneRecordSender(Module):
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# # #
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pbuffer = stream.SyncFIFO(etherbone_mmap_description(32), buffer_depth)
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pbuffer = stream.SyncFIFO(etherbone_mmap_description(32), buffer_depth,
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buffered=True)
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self.submodules += pbuffer
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self.comb += sink.connect(pbuffer.sink)
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@ -1,12 +1,9 @@
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from math import ceil
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from copy import copy
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from collections import OrderedDict
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from migen import *
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from migen.genlib.misc import WaitTimer
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from misoc.interconnect import stream
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from misoc.interconnect.stream import EndpointDescription
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def reverse_bytes(signal):
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