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gateware/serwb/kusphy: use locally inverted clk_b on iserdese3

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This commit is contained in:
Florent Kermarrec 2017-11-10 10:35:48 +01:00
parent db82b11f29
commit 59be095512
1 changed files with 4 additions and 1 deletions
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5
artiq/gateware/serwb/kusphy.py
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@ -195,12 +195,15 @@ class KUSSerdes(Module):
i_IDATAIN=serdes_i_nodelay, o_DATAOUT=serdes_i_delayed
),
Instance("ISERDESE3",
p_IS_CLK_INVERTED=0,
p_IS_CLK_B_INVERTED=1,
p_DATA_WIDTH=8,
i_D=serdes_i_delayed,
i_RST=ResetSignal("serwb_serdes"),
i_FIFO_RD_CLK=0, i_FIFO_RD_EN=0,
i_CLK=ClockSignal("serwb_serdes_20x"), i_CLK_B=~ClockSignal("serwb_serdes_20x"),
i_CLK=ClockSignal("serwb_serdes_20x"),
i_CLK_B=ClockSignal("serwb_serdes_20x"), # locally inverted
i_CLKDIV=ClockSignal("serwb_serdes_5x"),
o_Q=serdes_q
)