|
8a988d0feb
|
kasli: remove leftover debug print
|
2018-05-18 17:25:23 +08:00 |
|
|
37bd0c2566
|
kasli: add USTC target
|
2018-05-18 16:15:07 +08:00 |
|
Florent Kermarrec
|
f77bcbebb5
|
serwb/test_serwb_core: fix
|
2018-05-16 08:34:53 +02:00 |
|
Florent Kermarrec
|
77fc5c599f
|
serwb/test: update
|
2018-05-15 23:52:58 +02:00 |
|
Florent Kermarrec
|
3873d09692
|
serwb: rewrite high-speed phys by splitting clocking/tx/rx, scrambling is now always enabled.
|
2018-05-15 23:52:41 +02:00 |
|
Florent Kermarrec
|
f8a9dd930b
|
serwb/genphy: add device parameter (not used here, but this way all the phys share the same parameters), scrambling is also now always enabled.
|
2018-05-15 23:51:14 +02:00 |
|
Florent Kermarrec
|
2c627cd061
|
serwb/scrambler: simplify and set scrambler input data to 0 when sink.stb == 0
|
2018-05-15 23:49:17 +02:00 |
|
Florent Kermarrec
|
c18a73d45f
|
sayma_amc/rtm: use new serwb low-speed phy
|
2018-05-15 16:40:50 +02:00 |
|
Florent Kermarrec
|
913d1e8e12
|
serwb: add generic low-speed phy (125Mhz linerate, same phy for ultrascale/7-series)
|
2018-05-15 16:39:39 +02:00 |
|
Florent Kermarrec
|
520aade8fe
|
serwb/scrambler: cleanup/fix potential bug
|
2018-05-15 16:30:52 +02:00 |
|
|
504d37b66b
|
suservo: add SI units functions and document
m-labs/artiq#788
|
2018-05-14 12:26:49 +00:00 |
|
|
d71e4e60a9
|
suservo: use addition for offset
|
2018-05-14 12:26:49 +00:00 |
|
|
27f975e7bb
|
kasli: eem DifferentialInputs need DIFF_TERM
cleanup some formatting on the way
|
2018-05-14 12:26:49 +00:00 |
|
|
2a47b934ea
|
suservo: remove adc return clock gating
|
2018-05-14 12:26:49 +00:00 |
|
|
74c0b4452b
|
suservo: clkout and sdo[b-d] are inverted
|
2018-05-14 12:26:49 +00:00 |
|
|
04240cdc08
|
suservo: sampler channels are reversed
|
2018-05-14 12:25:09 +00:00 |
|
|
3027951dd8
|
integrate new AD9914 driver
moninj, analyzer, docs, examples, tests.
|
2018-05-13 23:29:35 +08:00 |
|
whitequark
|
ee4c475cf3
|
gateware: fix Sayma satellite build.
RTIO clock multiplier was removed from Sayma in 32f22f4c .
|
2018-05-13 13:10:39 +00:00 |
|
|
8c1390e557
|
kasli: use 62.5MHz clock for siphaser reference (#999)
|
2018-05-12 22:58:03 +08:00 |
|
|
2426fea3f2
|
siphaser: support external reference for the freerunning 150MHz
|
2018-05-12 22:57:11 +08:00 |
|
|
6796413a53
|
serwb: remove unnecessary shebang line
|
2018-05-12 22:49:44 +08:00 |
|
Florent Kermarrec
|
f5208ff2f3
|
serwb/core: reduce buffering, use buffered=True
|
2018-05-12 12:03:58 +02:00 |
|
Florent Kermarrec
|
fdc953e569
|
serwb/etherbone: recuce buffering
|
2018-05-12 12:03:11 +02:00 |
|
Florent Kermarrec
|
6e67e6d0b1
|
serwb: revert some changes (was breaking simulation)
|
2018-05-12 11:59:46 +02:00 |
|
Florent Kermarrec
|
0a6d4ccd85
|
serwb/phy: improve/cleanup init
|
2018-05-12 01:35:34 +02:00 |
|
Florent Kermarrec
|
b6ab59fb80
|
serwb/phy: increase timeout
|
2018-05-12 01:32:55 +02:00 |
|
Florent Kermarrec
|
e09dbc89bc
|
serwb: remove idelaye3 en_vtc (was not done correctly, we'll add direct software control)
|
2018-05-12 01:32:16 +02:00 |
|
Florent Kermarrec
|
cd4477864a
|
serwb: fix case when rtm fpga is not loaded, lvds input can be 0 or 1
|
2018-05-11 23:31:25 +02:00 |
|
|
2e3bf8602f
|
serwb: reduce buffering. Closes #997
|
2018-05-11 14:13:41 +08:00 |
|
|
6b811c1a8b
|
sayma: fix runtime/rtm gateware address conflict
|
2018-05-09 19:47:29 +08:00 |
|
|
f055bf88f6
|
suservo: add clip flags (#992)
|
2018-05-09 07:16:15 +00:00 |
|
Florent Kermarrec
|
60fd362d57
|
serwb: fix rx_comma detection
|
2018-05-07 23:54:35 +02:00 |
|
|
7d4a103a43
|
opticlock, suservo: set default kasli hw_rev
|
2018-05-07 09:07:18 +02:00 |
|
whitequark
|
b1d349cc1b
|
firmware: implement a sampling profiler.
Does not yet support constructing call graphs.
|
2018-05-05 00:44:40 +00:00 |
|
|
5f0cfadb30
|
rtio/sed: add unittest for sequence number rollover
|
2018-05-02 12:04:30 +08:00 |
|
|
4120105e3a
|
rtio/sed: fix output network cmp_wrap
|
2018-05-02 12:04:03 +08:00 |
|
|
bce8fa3ec5
|
rtio/sed: add replace unittest at the top level (#978)
|
2018-05-02 10:58:18 +08:00 |
|
|
83fb431cd0
|
rtio/sed: pass sequence numbers through the FIFOs. Closes #978
|
2018-05-02 10:57:57 +08:00 |
|
Florent Kermarrec
|
05955bfd79
|
sayma_rtm: use bufio for sys4x (needed since we are using a -1 speedgrade)
|
2018-05-01 22:16:35 +02:00 |
|
Florent Kermarrec
|
84e1f05559
|
sayma_rtm: make cd_sys4x clock domain reset_less
|
2018-05-01 16:11:26 +02:00 |
|
Florent Kermarrec
|
64c8eee28d
|
serwb/phy/master: fix slave ready detection by filtering possible glitches on rx data (seems to happen when RTM fpga is not loaded)
|
2018-04-30 23:59:56 +02:00 |
|
|
5a683ddd1f
|
Revert "kasli: force hw_rev for the different targets"
This reverts commit 17d7d7856a .
Would require filtering it in misoc or better
removing the argparse option.
|
2018-04-28 23:24:41 +02:00 |
|
|
17d7d7856a
|
kasli: force hw_rev for the different targets
|
2018-04-28 21:30:29 +02:00 |
|
|
5d3c76fd50
|
sayma_rtm: use bitstream opts in migen
|
2018-04-27 15:43:32 +00:00 |
|
|
5f00326c65
|
suservo: coeff mem write port READ_FIRST
|
2018-04-27 15:43:32 +00:00 |
|
|
307cd07b9d
|
suservo: lots of gateware/ runtime changes
tested/validated:
* servo enable/disable
* dds interface, timing, io_update, mask_nu
* channel control (en_out, en_iir, profile)
* profile configuration (coefficients, delays, offsets, channel)
* adc timings and waveforms measured
* asf state readback
* adc readback
individual changes below:
suservo: correct rtio readback
suservo: example, device_db [wip]
suservo: change rtio channel layout
suservo: mem ports in rio domain
suservo: sck clocked from rio_phy
suservo: cleanup, straighten out timing
suservo: dds cs polarity
suservo: simplify pipeline
suservo: drop unused eem names
suservo: decouple adc SR from IIR
suservo: expand coredevice layer
suservo: start the correct stage
suservo: actually load ctrl
suservo: refactor/tweak adc timing
suservo: implement cpld and dds init
|
2018-04-27 13:50:26 +02:00 |
|
Florent Kermarrec
|
8212e46f5e
|
sayma_amc: filter jesd refclk/sysref with jreset (hmc7043 can generate noise when unconfigured see sinara issue #541)
|
2018-04-27 13:04:37 +02:00 |
|
|
f9b2c32739
|
suservo: add pgia spi channel
|
2018-04-25 17:14:25 +00:00 |
|
|
c83305065a
|
suservo: add servo/config/status register
|
2018-04-25 15:59:06 +00:00 |
|
|
105068ad90
|
suservo: fix restart timing
|
2018-04-25 15:19:49 +00:00 |
|
|
c304b6207a
|
suservo: drop adc idelays
|
2018-04-25 14:59:50 +00:00 |
|
|
b44d6517d1
|
suservo: use 125 MHz SDR ADC
* easier timing
* natural sampling on rising edge
* timing, signal robustness
* adjust the servo iteration timing
|
2018-04-25 14:32:23 +00:00 |
|
|
37c186a0fc
|
suservo: refactor, constrain
* remove DiffMixin, move pad layout handling to pads
* add input delay constraints, IDELAYs
|
2018-04-25 13:44:52 +00:00 |
|
|
d0258b9b2d
|
suservo: set input delays
|
2018-04-24 15:30:25 +00:00 |
|
|
fe75064c1e
|
suservo: cleanup rtio interface
|
2018-04-24 13:08:40 +00:00 |
|
|
3942c2d274
|
suservo: fix clkout cd drive
|
2018-04-24 10:18:32 +00:00 |
|
|
f74998a5e0
|
suservo: move arch logic to top, fix tests
|
2018-04-23 21:11:26 +00:00 |
|
|
4903eb074c
|
suservo: use BUFIO/BUFH for ADC
|
2018-04-23 18:30:19 +00:00 |
|
|
e36deab0a8
|
suservo/adc: try to help vivado extract srls
|
2018-04-23 18:30:19 +00:00 |
|
|
929ed4471b
|
kasli/SUServo: use suservo, implement urukul_qspi
m-labs/artiq#788
|
2018-04-23 18:30:18 +00:00 |
|
|
4c1e356f67
|
suservo: add pads rewiring layer for eems
|
2018-04-23 18:30:18 +00:00 |
|
|
99dd9c7a2a
|
suservo: fix rtio interface width
|
2018-04-23 18:30:18 +00:00 |
|
|
d5eea962ec
|
suservo: fix cnv_b diff
|
2018-04-23 18:30:12 +00:00 |
|
|
c8fd63754a
|
suservo: add unittests
m-labs/artiq#788
|
2018-04-23 18:25:59 +00:00 |
|
|
934c41b90a
|
gateware: add suservo
from
fe4b60b902
m-labs/artiq#788
|
2018-04-23 18:24:59 +00:00 |
|
Florent Kermarrec
|
439d2bf2bc
|
sayma/serwb: adapt, full reset of rtm on link reset
|
2018-04-17 19:24:03 +02:00 |
|
Florent Kermarrec
|
8edf4541d6
|
serwb: adapt test
|
2018-04-17 19:21:53 +02:00 |
|
Florent Kermarrec
|
20ccc9d82f
|
serwb/core/phy: move scrambler in phy, add link test, revert delay min/max checks
|
2018-04-17 19:21:21 +02:00 |
|
Florent Kermarrec
|
ebfac36223
|
serwb/scrambler: dynamic enable/disable
|
2018-04-17 19:20:06 +02:00 |
|
Florent Kermarrec
|
816a6f2ec7
|
serwb/phys: remove phy_width (revert linerate to 1Gbps)
|
2018-04-17 19:19:18 +02:00 |
|
|
eac447278f
|
kasli: add MITLL variant
|
2018-04-17 19:00:11 +08:00 |
|
|
756e120c27
|
kasli/sysu: add comments
|
2018-04-17 18:46:55 +08:00 |
|
Florent Kermarrec
|
1acd7ea1db
|
sayma/serwb: re-enable scrambling
|
2018-04-17 00:49:36 +02:00 |
|
Florent Kermarrec
|
ca01c8f1cb
|
sayma: reduce serwb linerate to 500Mbps
|
2018-04-16 23:19:15 +02:00 |
|
Florent Kermarrec
|
825a2158ba
|
serwb: add phy_width parameter to allow reducing linerate to 500Mbps or 250Mbps
|
2018-04-16 23:19:14 +02:00 |
|
Florent Kermarrec
|
bb90fb7d59
|
sayma/serwb: remove scrambling (does not seems to work on sayma for now...)
|
2018-04-07 15:57:57 +02:00 |
|
Florent Kermarrec
|
6aa8e2c433
|
serwb/test: replace valid/ready with stb/ack
|
2018-04-07 15:55:57 +02:00 |
|
Florent Kermarrec
|
73dbc0b6b6
|
serwb/test: adapt to new version
|
2018-04-07 15:09:29 +02:00 |
|
Florent Kermarrec
|
e15f8aa903
|
sayma/serwb: enable scrambling
|
2018-04-07 14:52:37 +02:00 |
|
Florent Kermarrec
|
9d0e8c27ff
|
serwb/scrambler: add flow control
|
2018-04-07 14:51:17 +02:00 |
|
Florent Kermarrec
|
2f8bd022f7
|
sayma_rtm: remove sys0p2x clock
|
2018-04-07 03:10:34 +02:00 |
|
Florent Kermarrec
|
1fd96eb0fd
|
serwb: replace valid/ready with stb/ack
|
2018-04-07 03:06:19 +02:00 |
|
Florent Kermarrec
|
c8a08375f8
|
serwb: replace valid/ready with stb/ack
|
2018-04-07 03:03:44 +02:00 |
|
Florent Kermarrec
|
73b727cade
|
serwb: new version using only sys/sys4x clocks domains, scrambling deactivated.
|
2018-04-07 02:59:14 +02:00 |
|
Florent Kermarrec
|
dd21c07b85
|
targets/sayma_rtm: fix serwb 2 ...
|
2018-04-03 18:59:05 +02:00 |
|
Florent Kermarrec
|
7488703f23
|
targets/sayma_rtm: fix serwb
|
2018-04-03 18:57:00 +02:00 |
|
Florent Kermarrec
|
aef0153a8f
|
targets/sayma: adapt to new serwb clocking
|
2018-04-03 18:53:39 +02:00 |
|
Florent Kermarrec
|
3248caa184
|
gateware/serwb: move all clocking outside of serwb, use existing sys/sys4x clocks
|
2018-04-03 18:48:08 +02:00 |
|
|
f0771765c1
|
rtio: move CRI write comment to more appropriate location
|
2018-03-29 23:55:00 +08:00 |
|
|
493d2a653f
|
siphaser: add false path between sys_clk and mmcm_freerun_output
|
2018-03-29 10:55:41 +08:00 |
|
|
4229c045f4
|
kasli: fix DRTIO master clock constraint
|
2018-03-29 10:20:31 +08:00 |
|
|
3d89ba2e11
|
sayma: remove debug leftover
|
2018-03-29 10:20:17 +08:00 |
|
|
605292535c
|
kasli: ignore OSERDESE2->ISERDESE2 timing path on DRTIO targets as well
|
2018-03-29 10:12:02 +08:00 |
|
whitequark
|
bab6723ff2
|
Revert "gateware: don't run tests if there is no migen."
This reverts commit 4804cfef9b .
|
2018-03-26 03:33:52 +00:00 |
|
whitequark
|
4804cfef9b
|
gateware: don't run tests if there is no migen.
This allows us to skip testing gateware on Windows.
|
2018-03-26 03:26:34 +00:00 |
|
|
3a0dfb7fdc
|
ad53xx: port monitor, moninj dashboard, kc705 target
|
2018-03-24 16:04:02 +01:00 |
|
|
1553fc8c7d
|
sed: reset valid in output sorter
|
2018-03-23 11:11:11 +00:00 |
|
|
770b0a7b79
|
novogorny: conv -> cnv
* parity with sampler
* also add novogorny device to opticlock
|
2018-03-21 18:38:42 +00:00 |
|
|
1afce8c613
|
kasli: simplify single eem pin formatting
|
2018-03-21 13:08:42 +01:00 |
|
|
d48b8f3086
|
kasli: fix sampler sdr/cnv pins
|
2018-03-21 09:28:00 +00:00 |
|
|
1fb5907362
|
kasli: add SUServo variant (Sampler-Urukul Servo)
|
2018-03-21 08:53:26 +00:00 |
|
|
f74d5772f4
|
sampler: add wide eem definition
|
2018-03-21 08:53:26 +00:00 |
|
|
32f22f4c9c
|
sayma: disable SERDES TTL entirely
Timing closure becomes very random, even at 4X.
|
2018-03-21 13:03:48 +08:00 |
|
|
f8c2d54e75
|
ttl_serdes_ultrascale: configurable SERDES ratio. Also try X4 on Sayma
|
2018-03-21 13:01:38 +08:00 |
|
|
9c2d343052
|
sayma: use SERDES RTIO TTL
This is not enabled on the standalone design as it breaks timing.
|
2018-03-21 10:53:52 +08:00 |
|
|
c8020f6bbd
|
ttl_serdes_generic: fix/upgrade test
|
2018-03-20 16:46:57 +08:00 |
|
|
a5825184b7
|
add ttl_serdes_ultrascale (untested)
|
2018-03-20 16:07:23 +08:00 |
|
|
fad066f1aa
|
ttl_serdes_7series: cleanup indentation
Inconsistent with other code and confuses text editors.
|
2018-03-20 15:50:04 +08:00 |
|
Thomas Harty
|
37d431039d
|
Fix typos.
Reduce ififo depth to 4 for Zotino.
|
2018-03-19 09:42:18 +00:00 |
|
Thomas Harty
|
c4fa44bc62
|
Add Zotino and Sampler functions to Kasli. Add Zotino to Kasli EEM 7 on OptiClock.
|
2018-03-18 00:25:43 +00:00 |
|
|
a315ecd10b
|
rtio/ttl_serdes_7series: reset IOSERDES (#958)
|
2018-03-14 09:01:29 +08:00 |
|
|
2fdc180601
|
dsp/fir: outputs reset_less (pipelined)
|
2018-03-13 17:11:50 +00:00 |
|
|
2edf65f57b
|
drtio: fix satellite minimum_coarse_timestamp clock domain (#947)
|
2018-03-13 00:20:57 +08:00 |
|
|
1d081ed6c2
|
drtio: print diagnostic info on satellite write underflow (#947)
|
2018-03-12 23:41:19 +08:00 |
|
Florent Kermarrec
|
eb6e59b44c
|
sayma_rtm: fix serwb timing constraints (was causing the gated clock warning)
|
2018-03-12 11:25:29 +01:00 |
|
|
6dfebd54dd
|
ttl_serdes_7series: use correct IBUFDS_INTERMDISABLE port names
|
2018-03-12 10:37:33 +08:00 |
|
|
fc3d97f1f7
|
drtio: remove spurious multichannel transceiver clock constraints
They used to cause (otherwise harmless) Vivado critical warnings.
|
2018-03-09 22:46:27 +08:00 |
|
|
caf7b14b55
|
kasli: generate fine RTIO clock in DRTIO targets, separate RTIO channel code
|
2018-03-09 22:36:16 +08:00 |
|
|
3fbcf5f303
|
drtio: remove TSC correction (#40)
|
2018-03-09 10:36:17 +08:00 |
|
|
e38187c760
|
drtio: increase default underflow margin. Closes #947
|
2018-03-09 00:49:24 +08:00 |
|
|
8bd15d36c4
|
drtio: fix error CSR edge detection (#947)
|
2018-03-08 16:28:25 +08:00 |
|
|
82831a85b6
|
kasli/opticlock: add eem6 phys
|
2018-03-07 21:32:59 +01:00 |
|
|
3a6566f949
|
rtio: judicious spray with reset_less=True
Hoping to reduce rst routing difficulty and easier RTIO timing closure.
|
2018-03-07 14:57:18 +00:00 |
|
|
b0282fa855
|
spi2: reset configuration in rio_phy
|
2018-03-07 14:42:11 +00:00 |
|
|
4af7600b2d
|
Revert "LaneDistributor: try equivalent spread logic"
This reverts commit 8b70db5f17 .
Just a shot into the dark.
|
2018-03-07 11:34:51 +00:00 |
|
|
a6d1b030c1
|
RTIO: use TS counter in the correct CD
artiq/m-labs#938
|
2018-03-07 11:34:42 +00:00 |
|
|
8b70db5f17
|
LaneDistributor: try equivalent spread logic
|
2018-03-07 11:34:42 +00:00 |
|
|
2cbd597416
|
LaneDistributor: style and signal consolidation [NFC]
|
2018-03-07 11:34:42 +00:00 |
|
|
916197c4d7
|
siphaser: cleanup
|
2018-03-07 11:15:44 +08:00 |
|
|
f7aba6b570
|
siphaser: fix phase_shift_done CSR
|
2018-03-07 10:57:30 +08:00 |
|
|
acfd9db185
|
siphaser: minor cleanup
|
2018-03-07 10:57:30 +08:00 |
|
|
7d98864b31
|
sayma: enable siphaser
|
2018-03-07 10:57:30 +08:00 |
|
|
a6e29462a8
|
sayma: enable multilink DRTIO
|
2018-03-07 10:57:30 +08:00 |
|
|
c34d00cbc9
|
drtio: implement Si5324 phaser gateware and partial firmware support
|
2018-03-07 10:57:30 +08:00 |
|
|
994ceca9ff
|
sayma_amc: disable slave fpga gateware loading
|
2018-03-06 17:27:43 +01:00 |
|
|
62af7fe2ac
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Revert "kasli/opticlock: use plain ttls for channels 8-23"
This reverts commit bd5c222569eb68d624a5ac1e9f2542f6ee553f83.
No decrease in power consumption or improvement in timing.
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2018-03-06 14:27:19 +01:00 |
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fd3cdce59a
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kasli/opticlock: use plain ttls for channels 8-23
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2018-03-06 14:27:19 +01:00 |
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50298a6104
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ttl_serdes_7series: suppress diff_term in outputs
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2018-03-06 14:27:19 +01:00 |
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e356150ac4
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ttl_simple: support differential io
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2018-03-06 14:27:19 +01:00 |
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956098c213
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kasli: add second urukul, make clk_sel drive optional
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2018-03-06 14:26:27 +01:00 |
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07de7af86a
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kasli: make second eem optional in urukul
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2018-03-06 14:26:26 +01:00 |
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c25560baec
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sed: more LaneDistributor comments
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2018-03-06 20:56:35 +08:00 |
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f40255c968
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sed: add comments about key points in LaneDistributor
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2018-03-06 20:51:09 +08:00 |
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Florent Kermarrec
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5b3d6d57e2
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drtio/gth: power down rx on restart (seems to make link initialization reliable)
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2018-03-06 11:49:28 +01:00 |
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Florent Kermarrec
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64b05f07bb
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drtio/gth: use parameters from Xilinx transceiver wizard
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2018-03-06 11:02:15 +01:00 |
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Florent Kermarrec
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45f1e5a70e
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drtio/gth: cleanup import
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2018-03-06 10:56:07 +01:00 |
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6aaa8bf9d9
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drtio: fix link error generation
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2018-03-04 23:20:13 +08:00 |
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d747d74cb3
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test: fix test_dma
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2018-03-04 23:19:06 +08:00 |
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928d5dc9b3
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drtio: raise RTIOLinkError if operation fails due to link lost (#942)
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2018-03-04 01:02:53 +08:00 |
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ddcc68cff9
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sayma_amc: move bitstream options to migen
close #930
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2018-03-02 18:13:03 +08:00 |
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