Commit Graph

531 Commits

Author SHA1 Message Date
da9ca81856 Reverting changeset 2020-11-11 12:12:19 +01:00
3088a002c0 Adding documentation 2020-11-11 12:09:27 +01:00
8f399ec12b Reverting openocd change 2020-11-11 11:57:57 +01:00
aa36446f95 Adding updated docs for adc file 2020-11-11 11:57:14 +01:00
9cfb52308d Merge branch 'master' into feature/dma-updates 2020-11-11 08:59:50 +01:00
920d08c04c update cargosha256 2020-11-11 15:22:47 +08:00
db3bb511b4 Merge branch 'master' into feature/dma-updates 2020-11-10 16:55:25 +01:00
Ryan Summers
e0020f4a2a
Merge pull request #159 from quartiq/rs/hal-update
Utilize mainline stm32h7xx-hal
2020-11-10 16:53:00 +01:00
f164a1a89e Update PR 2020-11-10 15:31:19 +01:00
a32ca39ca0 Removing spaces 2020-11-10 15:19:44 +01:00
84e31ef036 Fixing directive position 2020-11-10 15:16:37 +01:00
7b86a2bc42 Adding comment about deprecation allowance 2020-11-10 15:14:49 +01:00
c804312e60 Fixing deprecation warnings 2020-11-10 15:13:57 +01:00
514314dced Merge branch 'master' into rs/hal-update 2020-11-10 15:13:12 +01:00
014137acf0 Updating QSPI frequency 2020-11-09 15:57:58 +01:00
fca38e5d63 Adding support for hardware IO_update 2020-11-09 15:16:44 +01:00
c97e4d9d20 Fixing merge issues 2020-11-09 12:33:18 +01:00
7e1a58f1f0 Merge branch 'feature/dma-updates' into feature/qspi-stream 2020-11-09 12:32:32 +01:00
8d807fa09b Adding WIP 2020-11-09 12:30:02 +01:00
28cb3906ac Adding WIP HRTimer 2020-11-07 11:01:48 +01:00
bdbda8766d
Merge pull request #164 from vertigo-designs/feature/pr-ci
Adding CI support for PRs
2020-11-05 09:13:28 +01:00
f1ee9a2af5 Adding CI support for PRs 2020-11-05 08:13:55 +01:00
bab9fbf5ac Merge branch 'master' into rs/hal-update 2020-11-05 08:09:45 +01:00
2e9fdd9d4d Updating stm32h7xx-hal 2020-11-05 08:06:42 +01:00
5cc21cfde8 Combining ADC + DAC ISRs 2020-11-03 16:09:00 +01:00
e95cad5bde Adding WIP updates 2020-11-03 10:52:37 +01:00
4e5459433e Formatting 2020-11-03 09:41:45 +01:00
adaca88a50 Adding ADC/DAC modules 2020-11-03 09:41:14 +01:00
20e9b6543c Adding WIP updates to using DMA 2020-11-03 09:36:03 +01:00
bors[bot]
f38c58ab53
Merge #162
162: added gateway r=ryan-summers a=nkuh

Fixes #158 

Co-authored-by: Niklas Kuhrmeyer <niklas.kuhrmeyer@ptb.de>
2020-10-30 12:37:45 +00:00
Niklas Kuhrmeyer
2f5d26aeaa decreased routes_storage 2020-10-30 13:33:59 +01:00
Niklas Kuhrmeyer
32d5e4dfe1 format 2020-10-30 13:32:47 +01:00
Niklas Kuhrmeyer
dfe3ac877a added gateway 2020-10-30 12:16:28 +01:00
f56487401c Adding updates for PHY support 2020-10-28 16:14:48 +01:00
11ff93e6f0 Fixing diff 2020-10-28 15:57:14 +01:00
e36b853dc8 Renaming clocks to ccdr 2020-10-28 15:51:08 +01:00
b4eeeb2042 Reverting unneeded changes 2020-10-28 15:44:52 +01:00
c058d4bcde Adding updates for 0.8.0 of the HAL 2020-10-28 15:41:27 +01:00
17c8e4d2e1 Updating to new HAL 2020-10-26 16:58:29 +01:00
071ccd17dc Adding WIP experimental code 2020-10-22 16:16:38 +02:00
db182b923d Adding WIP QSPI streaming 2020-10-21 10:17:22 +02:00
dac6f73d5e WIP updates 2020-10-19 17:12:02 +02:00
66c917b576 update cargosha256 2020-10-08 14:42:58 +08:00
bors[bot]
e4b4d7af7c
Merge #142
142: Make stabilizer.py work on v0.4.0+ r=jordens a=HarryMakes

This is a "dirty" fix to have `stabilizer.py` working with the new API since v0.4.0, by applying the new JSON format for the IIRs as follows:

```json
{
    "req": "Write",
    "attribute": "stabilizer/iir?/state",
    "value": {
        "channel":1,
        "iir":{
            "ba":[b0,b1,b2,a1,a2],
            "y_offset":?,
            "y_min":?,
            "y_max":?
         }
    }
}
```

The actual ASCII data sent will convert the innermost `"` to `'`, then wrap the curly-bracketed tree of `value` with `"`.


Co-authored-by: Harry Ho <hh@m-labs.hk>
2020-09-16 07:39:52 +00:00
2029757c4e update cargosha256 2020-09-16 15:36:10 +08:00
bors[bot]
df238454c9
Merge #144
144: Fix syntax for taking core peripherals (required by cortex-m-rtic v0.5.5) r=jordens a=HarryMakes

This is to fix a panicking upon initialization problem that is caused by a now undefined behaviour in our code from the perspective of the latest release of the cortex-m-rtic crate. 

As per conversation in https://github.com/rtic-rs/cortex-m-rtic/issues/361, `context.core` should now be used instead of `cortex_m::Peripherals::take()`, which would cause some unexpected behaviour.

On a side note, a similar symptom where the Ethernet PHY does not get reset, as discussed in #141, might have also arisen from this new version of rtic. However, the reset delay still seems a bit too short to me.

Co-authored-by: Harry Ho <hh@m-labs.hk>
2020-09-16 06:59:29 +00:00
a979bf94dc update syntax for taking core periphs (required since rtic v0.5.5) 2020-09-16 14:25:36 +08:00
7e2d240e85 make stabilizer.py work on v0.4.0+ 2020-09-15 15:49:55 +08:00
bors[bot]
1a95f53717
Merge #134
134: build(deps): bump cortex-m-rt from 0.6.12 to 0.6.13 r=jordens a=dependabot[bot]

Bumps [cortex-m-rt](https://github.com/rust-embedded/cortex-m-rt) from 0.6.12 to 0.6.13.
<details>
<summary>Changelog</summary>
<p><em>Sourced from <a href="https://github.com/rust-embedded/cortex-m-rt/blob/v0.6.13/CHANGELOG.md">cortex-m-rt's changelog</a>.</em></p>
<blockquote>
<h2>[v0.6.13] - 2020-09-07</h2>
<h3>Fixed</h3>
<ul>
<li>(ARMv6-M) Set LR value to a known value on reset (as the ARM spec requires)</li>
<li>Added CFI and size info to external assembly subroutines (<code>HardFaultTrampoline</code>)</li>
</ul>
</blockquote>
</details>
<details>
<summary>Commits</summary>
<ul>
<li><a href="833f9a4056"><code>833f9a4</code></a> Merge <a href="https://github-redirect.dependabot.com/rust-embedded/cortex-m-rt/issues/296">#296</a></li>
<li><a href="3103b5ca88"><code>3103b5c</code></a> Bump to 0.6.13</li>
<li><a href="9e6ee34305"><code>9e6ee34</code></a> Merge <a href="https://github-redirect.dependabot.com/rust-embedded/cortex-m-rt/issues/295">#295</a></li>
<li><a href="b785bcec5d"><code>b785bce</code></a> update changelog</li>
<li><a href="880827e1d0"><code>880827e</code></a> add CFI and size info to external assembly</li>
<li><a href="2907763115"><code>2907763</code></a> Merge <a href="https://github-redirect.dependabot.com/rust-embedded/cortex-m-rt/issues/292">#292</a></li>
<li><a href="c9c9aa02f7"><code>c9c9aa0</code></a> fix compile-fail test</li>
<li><a href="6afc21a7c1"><code>6afc21a</code></a> [ARMv6-M] initialize the LR register</li>
<li>See full diff in <a href="https://github.com/rust-embedded/cortex-m-rt/compare/v0.6.12...v0.6.13">compare view</a></li>
</ul>
</details>
<br />


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Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com>
2020-09-12 06:09:12 +00:00
47617fafd1 update cargosha256 2020-09-11 22:30:18 +08:00