dependabot[bot]
d679a9af61
build(deps): bump serde from 1.0.120 to 1.0.123
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Bumps [serde](https://github.com/serde-rs/serde ) from 1.0.120 to 1.0.123.
- [Release notes](https://github.com/serde-rs/serde/releases )
- [Commits](https://github.com/serde-rs/serde/compare/v1.0.120...v1.0.123 )
Signed-off-by: dependabot[bot] <support@github.com>
2021-01-31 17:32:08 +00:00
12563ff9ab
Merge pull request #243 from quartiq/rpll2
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Rpll2
2021-01-31 18:31:03 +01:00
43342cef91
rpll: docs
2021-01-31 18:21:47 +01:00
d281783f2e
rpll: reduce code
2021-01-31 18:10:13 +01:00
80055076b8
lockin: scale output
2021-01-31 17:41:20 +01:00
82c8fa1a07
rpll: extend tests
2021-01-31 17:10:03 +01:00
ab20d67a07
rpll: remove redundant time tracking
2021-01-31 13:42:15 +01:00
6b2d8169f0
rpll: more/cleaner tests
2021-01-31 13:25:01 +01:00
183d84ad7a
cargo.lock: update
2021-01-30 20:57:44 +01:00
be7aad1b81
rpll: add unittest
2021-01-30 20:49:31 +01:00
0d1b237202
complex: richer API
2021-01-30 18:05:54 +01:00
0d6b5e894c
Merge pull request #245 from vertigo-designs/rs/issue-244/gdb-fix
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Removing invalid GDB command
2021-01-29 10:54:48 +01:00
d2221b8fb7
Removing invalid GDB command
2021-01-29 10:18:47 +01:00
c34e330663
lockin: fmt
2021-01-28 23:00:55 +01:00
36288225b3
rpll: extend to above-nyquist frequencies
2021-01-28 22:21:42 +01:00
1749d48ca3
Revert "rpll: auto-align counter"
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This reverts commit dbacc5293e12f712fef7bd85848e1b0bd8fde823.
2021-01-27 09:01:07 +01:00
45e7d6de3c
rpll: auto-align counter
2021-01-27 09:01:07 +01:00
c769bdbd4c
Merge pull request #241 from quartiq/rpll
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Reciprocal PLL
2021-01-26 19:37:36 +01:00
7c1fa9695a
iir lowpass: f32 is sufficient
2021-01-26 19:37:05 +01:00
73c98c947a
iir_int: remove spurious note
2021-01-26 19:23:23 +01:00
2b439a0231
lockin: remove broken tests, to be rewritten
2021-01-26 19:22:02 +01:00
d1f41b3ad5
int_iir: use taylor for lowpass
2021-01-26 19:19:09 +01:00
7b9fc3b2b3
iir_int: move lowpass coefficient calculation to iirstate
2021-01-26 18:51:20 +01:00
9b3a47e08b
rpll: refine, simplify, document and comment
2021-01-26 18:49:31 +01:00
ea7b08fc64
rpll: refine
2021-01-26 14:40:44 +01:00
16009c3b7e
rpll: update lockin integration test
2021-01-25 12:00:47 +01:00
9f9744b9e6
rpll: implement
2021-01-25 11:45:59 +01:00
df337f85b8
reciprocal_pll -> rpll
2021-01-25 09:54:56 +01:00
659a6879f7
Merge pull request #231 from quartiq/lockin-bin
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Lockin bin
2021-01-22 16:25:56 +01:00
57a5c4ff9b
make lockin a unittest, not integration test
2021-01-22 16:04:02 +01:00
d0d2c6352d
lockin: refactor to use common lockin processing
2021-01-22 16:00:05 +01:00
eea5033d36
dsp bench: fix
2021-01-22 11:38:38 +01:00
0cd2140668
rafactor complex, cossin, atan2
2021-01-21 16:12:59 +01:00
cb280c3303
lockin integration: reduce and refactor further
2021-01-21 15:01:17 +01:00
948e58c910
lockin: refactor Lockin
2021-01-21 14:57:44 +01:00
5af2b9c63a
fmt
2021-01-20 15:34:56 +01:00
c078de05cc
lockin: fix adc value conversion
2021-01-20 15:31:46 +01:00
41a907a4bf
Merge branch 'master' into lockin-bin
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* master:
hitl: undo bin change to make merging easier
build(deps): bump serde from 1.0.118 to 1.0.120
hitl: dispatch entire github object
build(deps): bump log from 0.4.11 to 0.4.13
2021-01-20 15:20:12 +01:00
dependabot[bot]
19a9d92220
Merge pull request #233 from quartiq/dependabot/cargo/serde-1.0.120
2021-01-20 14:12:58 +00:00
dependabot[bot]
7554a1e696
Merge pull request #224 from quartiq/dependabot/cargo/log-0.4.13
2021-01-20 14:12:42 +00:00
1cf3ce322c
Merge pull request #235 from quartiq/hitl
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hitl: dispatch entire github object
2021-01-20 15:10:54 +01:00
94c4f8e6f7
hitl: undo bin change to make merging easier
2021-01-20 15:09:50 +01:00
2236e5f8ab
Merge remote-tracking branch 'origin/master' into hitl
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* origin/master: (34 commits)
Reordering lib.rs
Removing main.rs
Adding support for multiple applications
Fixing build
Moving panic configuration
Reordering
Refactoring to support multiple apps
Updating timer compare offsets
reciprocal_pll: remove unneeded type cast
revert changes in main.rs and server.rs
dsp: add reciprocal_pll
fix bug in which real signal component is assigned twice
fix cargo fmt style
use only integer iir
remove TODO note relating ADC_BATCHES and calculate_timestamp_timer_period
shift sin/cos before demodulation product to avoid i64
use round up half integer rounding
move timestamp handling into new TimestampHandler struct
move lock-in code to main.rs
remove debug_assert in divide_round
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2021-01-20 15:08:47 +01:00
775fb79ed9
ci: update
2021-01-20 15:02:35 +01:00
d014ed0fe0
add lockin bin
2021-01-20 14:29:29 +01:00
603d6df6a4
Merge branch 'master' into lockin-bin
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* master:
Reordering lib.rs
Removing main.rs
Adding support for multiple applications
Fixing build
Moving panic configuration
Reordering
Refactoring to support multiple apps
2021-01-20 14:19:28 +01:00
a31c9a5a7a
Merge pull request #234 from vertigo-designs/feature/multi-app-support
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Feature/multi app support
2021-01-20 14:09:47 +01:00
507e334ec5
lockin: tweak impl
2021-01-20 14:07:57 +01:00
4d0b1b5566
Reordering lib.rs
2021-01-20 13:44:53 +01:00
86355c9c5d
Removing main.rs
2021-01-20 13:44:16 +01:00
