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7929 Commits

Author SHA1 Message Date
Sebastien Bourdeauducq f542f045da manual: use git+https URL for ARTIQ flake 
github: flake URL lacks revCount
 2022-01-19 20:04:20 +08:00
Sebastien Bourdeauducq 53878fe1d4 flake: get version number from nix 2022-01-19 19:58:55 +08:00
Sebastien Bourdeauducq 735cd1eb3e manual: update development instructions 2022-01-14 16:50:08 +08:00
Steve Fan 3f812c4c2c
comm_kernel: fix RPC exception handling (#1801) 2022-01-12 15:23:37 +08:00
occheung b6c59a0cb3 update misoc dependencies 
Suppress warning when compiling libunwind.
7242dc5a41
 2022-01-11 17:32:19 +08:00
Steve Fan de5892a00a
comm_kernel: check if elements are within bounds for RPC list (#1824) 2022-01-11 17:16:45 +08:00
Peter Drmota 4eee49f889 gateware.test.suservo: Fix tests for python >=3.7 
Closes #1748
 2022-01-11 17:16:09 +08:00
occheung 9eee0e5a7b gateware/suservo: fix profile no. in test 
Follow-up/Test update for 9d49302.
 2022-01-11 14:20:47 +08:00
Steve Fan d7dd75e833 comm_kernel: fix off-by-one error for numeric value range check 2022-01-11 10:13:42 +08:00
Spaqin 095fb9e333
add Almazny support (#1780) 2022-01-11 09:55:39 +08:00
Sebastien Bourdeauducq 4e3e0d129c firmware: fix compilation warning 2022-01-11 09:31:26 +08:00
pca006132 12ee326fb4 firmware: fixed personality function 2022-01-11 09:30:19 +08:00
occheung 61349f9685 sinara_tester: fix outdated API 2022-01-10 17:23:28 +08:00
occheung cea0a15e1e suservo: use default urukul profile 2022-01-10 16:21:39 +08:00
occheung 8b45f917d1 urukul: use default profile 2022-01-10 16:21:39 +08:00
pca006132 6542b65db3 compiler: fixed exception codegen issues 2022-01-10 15:54:29 +08:00
pca006132 9f90088fa6 compiler: generate appropriate landingpad IR 
When used together with modified personality function, we got ~20%
performance improvement in exception unwinding with zynq.
 2022-01-10 15:54:29 +08:00
occheung 5e1847e7c1 compiler: rename `variables` to `retainedNodes` 
Part of the changes that was made to LLVM 6 by the time that LLVM 7 was released.
LLVM commit: 2c864551df
LLVM differential review: https://reviews.llvm.org/D45024
 2022-01-10 11:28:37 +08:00
occheung 6f3c49528d compiler: revert cabe5ac 
The lack of debug emitter causes #1821.
 2022-01-10 11:26:03 +08:00
Sebastien Bourdeauducq eaa1505c94 update documentation (#1820) 2022-01-08 11:55:52 +08:00
Leon Riesebos f42bea06a8 worker_db: removed warning for writing a dataset that is also in the archive 
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
 2022-01-08 11:48:18 +08:00
occheung 9d493028e5 gateware/suservo: write to profile 7 
Fixes #1817.
 2022-01-07 16:41:19 +08:00
Sebastien Bourdeauducq bbac477092 tools: fix importlib issue 2021-12-21 13:20:11 +08:00
Steve Fan c0a7be0a90 llvm_ir: move stacksave before lltag alloca in build_rpc 
Signed-off-by: Steve Fan <sf@m-labs.hk>
 2021-12-19 00:07:07 +00:00
Sebastien Bourdeauducq 9e5e234af3 stop using explicit ProactorEventLoop on Windows 
It is now the default in Python.
 2021-12-14 20:06:38 +08:00
Sebastien Bourdeauducq 352317df11 test_dataset_db: remove (too much breakage on Windows) 2021-12-14 19:27:15 +08:00
Sebastien Bourdeauducq a518963a47 test_dataset_db: disable tests broken on windows 2021-12-14 19:19:22 +08:00
Sebastien Bourdeauducq 37f14d94d0 test_dataset_db: fix for windows 2021-12-14 19:07:17 +08:00
Sebastien Bourdeauducq 4f723e19a6 RELEASE_NOTES: update 2021-12-14 00:05:49 +08:00
Peter Drmota 7c664142a5
Simplified use of the AD9910 RAM feature (#1584) 
* coredevice: Change Urukul default single-tone profile to 7

This allows using the internal profile control in RAM modulation mode (which always starts to play back at profile 0) without competing for the content of the profile 0 register used in single tone mode.

Signed-off-by: Peter Drmota <peter.drmota@physics.ox.ac.uk>

* ad9910/set_mu: comment on caveats when setting register

* ad9910: avoid unnecessary write/param

Credit: Solution proposed by @pmldrmota in https://github.com/m-labs/artiq/pull/1584#issuecomment-987774353

* revert 1064fdff (`set_mu()` comments)

158a7be7 had addressed this issue.

Co-authored-by: occheung <dc@m-labs.hk>
 2021-12-13 23:44:03 +08:00
Etienne Wodey 33a9ca2684 tools/file_import: use SourceFileLoader 
This allows loading modules from files with extensions not in
importlib.machinery.SOURCE_SUFFIXES

Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
 2021-12-09 11:47:04 +08:00
Sébastien Bourdeauducq 311a818a49
Merge pull request #1544 from airwoodix/dataset-compression 
datasets: support compression in HDF5 archives
 2021-12-06 12:43:19 +08:00
Sébastien Bourdeauducq 1def0d98c5
Merge branch 'master' into dataset-compression 2021-12-06 12:40:30 +08:00
Leon Riesebos 7ffe4dc2e3 coredevice: set default pow for ad9912 set_mu() 2021-12-06 12:34:55 +08:00
Leon Riesebos 9e3ea4e8ef coredevice: fixed type annotations for AD9910 2021-12-06 12:34:55 +08:00
Sebastien Bourdeauducq 12512bfb2f flake: get rid of TARGET_AR 2021-12-05 14:37:09 +08:00
Steve Fan 4a6bea479a
Host report for async error upon kernel termination (#1791) 
Closes #1644
 2021-12-04 13:33:24 +08:00
Sebastien Bourdeauducq 9bbf7eb485 flake: use ed25519 key for hitl 2021-12-03 18:35:10 +08:00
mwojcik f8a649deda release notes: mention 100mhz support 2021-12-03 17:19:11 +08:00
mwojcik 7953f3d705 kc705: add drtio 100mhz clk switch 2021-12-03 17:19:11 +08:00
mwojcik f281112779 satman: add 100mhz si5324 settings 
siphaser: add calculated vco for 100mhz comment
 2021-12-03 17:19:11 +08:00
mwojcik eec3ea6589 siphaser: add support for 100mhz rtio 2021-12-03 17:19:11 +08:00
Sebastien Bourdeauducq 163f5d9128 flake: debug hitl auth failures 2021-12-03 17:16:54 +08:00
Etienne Wodey 9f830b86c0
kasli: add SED lanes count option to HW description JSON file (#1745) 
Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
 2021-12-03 17:05:35 +08:00
Sebastien Bourdeauducq b8e7add785 language: remove deprecated set_dataset(..., save=...) 2021-12-01 22:41:34 +08:00
Sebastien Bourdeauducq 5a923a0956 flake: switch to nixos- branch 2021-12-01 22:39:24 +08:00
David Nadlinger c6039479e4 compiler: Add lit test for call site attributes [nfc] 2021-11-27 04:46:07 +00:00
David Nadlinger 63b5727a0c compiler: Also emit byval argument attributes at call sites 
See previous commit.

GitHub: Fixes #1599.
 2021-11-27 04:45:50 +00:00
David Nadlinger 9b01db3d11 compiler: Emit sret call site argument attributes 
LLVM 6 seemed not to mind the mismatch, but more recent
versions produce miscompilations without this.

Needs llvmlite support (GitHub: numba/llvmlite#702).
 2021-11-27 04:44:41 +00:00
Sebastien Bourdeauducq 6a433b2fce artiq_sinara_tester: test Urukul attenuator digital control 2021-11-24 18:57:16 +08:00