mirror of https://github.com/m-labs/artiq.git
urukul: use default profile
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6542b65db3
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@ -7,6 +7,7 @@ from artiq.language.types import TBool, TInt32, TInt64, TFloat, TList, TTuple
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from artiq.coredevice import spi2 as spi
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from artiq.coredevice import urukul
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from artiq.coredevice.urukul import DEFAULT_PROFILE
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# Work around ARTIQ-Python import machinery
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urukul_sta_pll_lock = urukul.urukul_sta_pll_lock
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@ -60,6 +61,9 @@ RAM_MODE_BIDIR_RAMP = 2
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RAM_MODE_CONT_BIDIR_RAMP = 3
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RAM_MODE_CONT_RAMPUP = 4
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# Default profile for RAM mode
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_DEFAULT_PROFILE_RAM = 0
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class SyncDataUser:
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def __init__(self, core, sync_delay_seed, io_update_delay):
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@ -518,7 +522,8 @@ class AD9910:
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@kernel
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def set_mu(self, ftw: TInt32 = 0, pow_: TInt32 = 0, asf: TInt32 = 0x3fff,
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phase_mode: TInt32 = _PHASE_MODE_DEFAULT,
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ref_time_mu: TInt64 = int64(-1), profile: TInt32 = 7,
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ref_time_mu: TInt64 = int64(-1),
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profile: TInt32 = DEFAULT_PROFILE,
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ram_destination: TInt32 = -1) -> TInt32:
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"""Set DDS data in machine units.
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@ -588,13 +593,14 @@ class AD9910:
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return pow_
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@kernel
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def get_mu(self, profile: TInt32 = 0) -> TTuple([TInt32, TInt32, TInt32]):
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def get_mu(self, profile: TInt32 = DEFAULT_PROFILE
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) -> TTuple([TInt32, TInt32, TInt32]):
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"""Get the frequency tuning word, phase offset word,
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and amplitude scale factor.
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.. seealso:: :meth:`get`
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:param profile: Profile number to get (0-7, default: 0)
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:param profile: Profile number to get (0-7, default: 7)
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:return: A tuple ``(ftw, pow, asf)``
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"""
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@ -608,8 +614,9 @@ class AD9910:
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@kernel
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def set_profile_ram(self, start: TInt32, end: TInt32, step: TInt32 = 1,
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profile: TInt32 = 0, nodwell_high: TInt32 = 0,
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zero_crossing: TInt32 = 0, mode: TInt32 = 1):
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profile: TInt32 = _DEFAULT_PROFILE_RAM,
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nodwell_high: TInt32 = 0, zero_crossing: TInt32 = 0,
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mode: TInt32 = 1):
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"""Set the RAM profile settings.
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:param start: Profile start address in RAM.
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@ -839,7 +846,7 @@ class AD9910:
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@kernel
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def set(self, frequency: TFloat = 0.0, phase: TFloat = 0.0,
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amplitude: TFloat = 1.0, phase_mode: TInt32 = _PHASE_MODE_DEFAULT,
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ref_time_mu: TInt64 = int64(-1), profile: TInt32 = 7,
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ref_time_mu: TInt64 = int64(-1), profile: TInt32 = DEFAULT_PROFILE,
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ram_destination: TInt32 = -1) -> TFloat:
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"""Set DDS data in SI units.
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@ -860,12 +867,13 @@ class AD9910:
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profile, ram_destination))
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@kernel
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def get(self, profile: TInt32 = 0) -> TTuple([TFloat, TFloat, TFloat]):
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def get(self, profile: TInt32 = DEFAULT_PROFILE
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) -> TTuple([TFloat, TFloat, TFloat]):
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"""Get the frequency, phase, and amplitude.
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.. seealso:: :meth:`get_mu`
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:param profile: Profile number to get (0-7, default: 0)
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:param profile: Profile number to get (0-7, default: 7)
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:return: A tuple ``(frequency, phase, amplitude)``
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"""
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@ -52,6 +52,9 @@ CS_DDS_CH1 = 5
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CS_DDS_CH2 = 6
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CS_DDS_CH3 = 7
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# Default profile
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DEFAULT_PROFILE = 7
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@portable
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def urukul_cfg(rf_sw, led, profile, io_update, mask_nu,
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@ -188,7 +191,7 @@ class CPLD:
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assert sync_div is None
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sync_div = 0
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self.cfg_reg = urukul_cfg(rf_sw=rf_sw, led=0, profile=7,
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self.cfg_reg = urukul_cfg(rf_sw=rf_sw, led=0, profile=DEFAULT_PROFILE,
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io_update=0, mask_nu=0, clk_sel=clk_sel,
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sync_sel=sync_sel,
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rst=0, io_rst=0, clk_div=clk_div)
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