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928d5dc9b3
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drtio: raise RTIOLinkError if operation fails due to link lost (#942)
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2018-03-04 01:02:53 +08:00 |
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5f083f21a4
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rtio/dma: fix signal width
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2017-10-08 22:37:46 +08:00 |
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5437f0e3e3
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rtio: make sequence errors consistently asychronous
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2017-09-29 14:40:06 +08:00 |
|
Florent Kermarrec
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2910b1be5e
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artiq/gateware/rtio/dma: replace leave_out with omit in Record.connect
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2017-07-04 10:48:06 +02:00 |
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838127d914
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rtio: break DMA timing path
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2017-07-02 10:24:01 +08:00 |
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whitequark
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391660e545
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gateware: simplify the CRI arbiter to use a plain mux.
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2017-04-05 15:09:19 +00:00 |
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b74d6fb9ba
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make collision and busy asynchronous errors, and simplify CPU/gateware handshake for output errors and reads
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2017-03-27 16:32:23 +08:00 |
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whitequark
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4de336fbe9
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gateware: reverse bytes of SDRAM word, not bits.
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2017-03-17 11:16:46 +00:00 |
|
whitequark
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6b63322106
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gateware: reverse SDRAM words in RTIO DMA engine.
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2017-03-17 07:29:28 +00:00 |
|
whitequark
|
4b14887ddb
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gateware: work around ISE/Vivado bugs with very wide shifts.
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2017-03-17 07:29:28 +00:00 |
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1e6a33b586
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rtio: handle input timeout in gateware
The information passed by the runtime will be used by the DRTIO core
to poll the remote side appropriately.
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2017-03-03 17:37:47 +08:00 |
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|
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f3c50a37ca
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rtio: always read full DMA sequence
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2016-12-06 01:05:47 +08:00 |
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c413d95b49
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rtio: fix DMA get_csrs
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2016-12-05 18:12:09 +08:00 |
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|
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b677c69faf
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rtio: fix handling of o_status in DMA
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2016-12-05 18:01:48 +08:00 |
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|
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75ea13748a
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rtio: fix DMA data MSB and stop signaling, self-checking unittest
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2016-12-05 18:01:48 +08:00 |
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|
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a5834765d0
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rtio: more DMA fixes, better stopping mechanism
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2016-12-05 18:01:48 +08:00 |
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|
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30bce5ad35
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rtio: DMA fixes
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2016-12-05 18:01:48 +08:00 |
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3931d8097b
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rtio: fix DMA TimeOffset stream.connect
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2016-12-01 16:43:46 +08:00 |
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|
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7c59688a12
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rtio: simple DMA fixes
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2016-12-01 16:30:48 +08:00 |
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cd3f68ba76
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rtio: DMA core (untested)
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2016-11-30 18:43:19 +08:00 |
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