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43 Commits (35f30ddf054ba123c923efcd3a0ddf28c758ef36)

Author SHA1 Message Date
Spaqin 35f30ddf05
Expose TTLClockGen for Kasli JSONs (#1886) 2022-05-06 13:33:42 +08:00
Sebastien Bourdeauducq 6d92e539b1 artiq_ddb_template: add aqctl_moninj_proxy 2022-03-19 22:33:03 +08:00
Spaqin a85b4d5f5e
I2C API for PCA9547 support (#1860) 2022-03-01 15:07:53 +08:00
Leon Riesebos c4292770f8
Kasli JSON description for SPI over DIO cards (#1800) 2022-02-26 07:36:00 +08:00
Spaqin 095fb9e333
add Almazny support (#1780) 2022-01-11 09:55:39 +08:00
Peter Drmota 20e079a381
AD9910 driver feature extension and SUServo IIR readability (#1500) 
* coredevice.ad9910: Add set_cfr2 function and extend arguments of set_cfr1 and set_sync

* SUServo: Wrap CPLD and DDS devices in a list

* SUServo: Refactor [nfc]

Co-authored-by: drmota <peter.drmota@physics.ox.ac.uk>
Co-authored-by: David Nadlinger <code@klickverbot.at>
 2021-11-15 12:09:16 +08:00
occheung 750b0ce46d ddb_temp: select appropriate compiler target 2021-11-08 16:59:08 +08:00
Sebastien Bourdeauducq 43d120359d compiler: switch to upstream llvmlite and RISC-V target 2021-09-10 13:25:12 +08:00
Leon Riesebos 2cf144a60c ddb_template: edge counter keys correspond with according ttl keys 
previously ttl_counter_0 and ttl_0 could be on completely different physical ttl output channels
with this change, ttl_0_counter (note the changed key format) is always on the same channel as ttl_0

Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
 2021-09-06 09:06:04 +08:00
Mikołaj Sowiński 898122f3e5
Added support for HVAMP_8CH (#1741) 2021-08-16 13:39:00 +08:00
Star Chen 9dee8bb9c9
Kasli: Added front panel user LED (#1623) (#1694) 2021-06-07 16:05:50 +08:00
Sebastien Bourdeauducq ea1dd2da43 artiq_ddb_template: kasli-soc support 2021-05-30 20:33:44 +08:00
Harry Ho 75efb8985c ddb_template: mirny_cpld: accept clk_sel as a string 2021-03-29 17:49:43 +08:00
Sebastien Bourdeauducq c675488a99 reorganize JSON schema files 2021-01-16 10:43:14 +08:00
Astro c6807f4594 kasli_generic: validate description against schema, use defaults from schema 2021-01-16 10:35:23 +08:00
occheung a017dafee6 ddb_template: mirny_cpld: add default value 
Signed-off-by: Oi Chee Cheung <dc@m-labs.hk>
 2020-12-15 11:00:59 +08:00
occheung 3f631c417d artiq_ddb_template: mirny_cpld: add refclk, clk_sel args 
Signed-off-by: occheung <occheung@connect.ust.hk>
 2020-12-14 13:38:20 +08:00
occheung 33d39b261a artiq_ddb_template: mirny_cpld: rename adf5355 to adf5356 
Signed-off-by: occheung <occheung@connect.ust.hk>
 2020-12-14 13:38:20 +08:00
SingularitySurfer 9b4b550f76 5 is correct. 2020-12-04 14:49:30 +00:00
SingularitySurfer cba631610c fixed phaser number of rtio channels 2020-12-04 14:40:59 +00:00
Robert Jördens d1be1212ab phaser: coredevice shim, dds [wip] 2020-08-26 15:10:50 +00:00
Robert Jördens 20fcfd95e9 phaser: coredevice shim, readback fix 2020-08-24 15:46:31 +00:00
Robert Jördens bcefb06e19 phaser: ddb template, split crc 2020-08-24 14:51:50 +00:00
Sebastien Bourdeauducq f273a9aacc artiq_ddb_template: remove SFP LEDs on hw 2.0+ 2020-07-08 18:15:36 +08:00
Robert Jördens 2c4e5bfee4 fastino: add [WIP] 2020-01-20 13:25:00 +01:00
Etienne Wodey da531404e8 artiq_ddb_template: add Mirny support 
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
 2020-01-20 13:13:08 +01:00
Sebastien Bourdeauducq 4416378d21 frontend: add --version to common tools 2019-11-14 11:42:31 +08:00
Sebastien Bourdeauducq 38fca01189 artiq_ddb_template: add su-servo support (#1343) 2019-09-11 15:52:25 +08:00
Sebastien Bourdeauducq 436662be52 ddb_template: add Novogorny support 2019-09-09 15:00:45 +08:00
Sebastien Bourdeauducq 69c2acd9d7 ddb_template: sampler cnv is ttl not spi 2019-09-09 14:57:42 +08:00
Robert Jördens 6655e567df ddb_template: urukul fixes 
* fix/add sw (ad9912 and ad9910)
* allow pll_n to be changed
 2019-06-14 10:53:03 +00:00
Robert Jördens 591de0e579 ddb_template: support urukul single-eem mode 2019-06-13 12:19:12 +00:00
Robert Jördens 967d192cbe ddb_template: wrong copy paste comma 2019-06-13 11:30:22 +00:00
Sebastien Bourdeauducq 86f462f40e artiq_ddb_template: add edge counter support 2019-05-09 17:20:13 +08:00
Sebastien Bourdeauducq c2622297bd urukul: use board_data instead of user_data to store calibration in EEPROM 2019-03-15 17:57:35 +08:00
Sebastien Bourdeauducq 5e7c83c9cf artiq_ddb_template: enable Urukul synchronization from EEPROM 2019-03-13 15:42:51 +08:00
Sebastien Bourdeauducq 852048dce4 artiq_ddb_template: create Urukul EEPROM device 2019-03-13 15:34:23 +08:00
Sebastien Bourdeauducq d39338d59f artiq_ddb_template: fix --satellite 2019-02-23 15:27:18 +08:00
Sebastien Bourdeauducq d79a6ee41c artiq_ddb_template: fix pll_vco indentation 2019-02-22 23:50:30 +08:00
Sebastien Bourdeauducq 05b128469f artiq_ddb_template: support setting Urukul pll_vco 2019-02-22 22:59:20 +08:00
Sebastien Bourdeauducq cd60803f21 device_ddb_template: add Sampler, Zotino, Grabber and SFP LED support 2019-02-22 20:07:15 +08:00
Sebastien Bourdeauducq 269f0a4d6f artiq_ddb_template: add Urukul support 2019-02-22 19:33:27 +08:00
Sebastien Bourdeauducq 8049c52d06 frontend: add artiq_ddb_template (WIP, TTL only) 2019-02-22 17:19:48 +08:00