mirror of https://github.com/m-labs/artiq.git
ddb_template: support urukul single-eem mode
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967d192cbe
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@ -112,7 +112,6 @@ class PeripheralManager:
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channel=rtio_offset+next(channel))
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return next(channel)
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# TODO: support 1-EEM mode
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def process_urukul(self, rtio_offset, peripheral):
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urukul_name = self.get_name("urukul")
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synchronization = peripheral.get("synchronization", False)
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@ -153,17 +152,18 @@ class PeripheralManager:
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}}""",
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name=urukul_name,
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channel=rtio_offset+next(channel))
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for i in range(4):
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self.gen("""
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device_db["ttl_{name}_sw{uchn}"] = {{
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {{"channel": 0x{channel:06x}}}
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}}""",
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name=urukul_name,
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uchn=i,
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channel=rtio_offset+next(channel))
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if len(peripheral["ports"]) > 1:
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for i in range(4):
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self.gen("""
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device_db["ttl_{name}_sw{uchn}"] = {{
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {{"channel": 0x{channel:06x}}}
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}}""",
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name=urukul_name,
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uchn=i,
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channel=rtio_offset+next(channel))
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self.gen("""
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device_db["{name}_cpld"] = {{
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"type": "local",
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@ -193,13 +193,13 @@ class PeripheralManager:
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"arguments": {{
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"pll_n": 32,
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"chip_select": {chip_select},
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"cpld_device": "{name}_cpld",
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"sw_device": "ttl_{name}_sw{uchn}"{pll_vco}{sync_delay_seed}{io_update_delay}
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"cpld_device": "{name}_cpld"{pll_vco}{sync_delay_seed}{io_update_delay}
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}}
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}}""",
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name=urukul_name,
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chip_select=4 + i,
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uchn=i,
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sw=",\n \"sw_device\": \"ttl_{name}_sw{uchn}\"".format(name=urukul_name, uchn=i) if len(peripheral["ports"]) > 1 else "",
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pll_vco=",\n \"pll_vco\": {}".format(pll_vco) if pll_vco is not None else "",
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sync_delay_seed=",\n \"sync_delay_seed\": \"eeprom_{}:{}\"".format(urukul_name, 64 + 4*i) if synchronization else "",
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io_update_delay=",\n \"io_update_delay\": \"eeprom_{}:{}\"".format(urukul_name, 64 + 4*i) if synchronization else "")
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