2
0
mirror of https://github.com/m-labs/artiq.git synced 2024-12-05 09:46:36 +08:00
Commit Graph

7807 Commits

Author SHA1 Message Date
75e8d54c27 install-with-conda: remove unnecessary import 2019-07-18 00:52:31 +08:00
2ffc843790 update installation instructions 2019-07-18 00:51:47 +08:00
David Nadlinger
280915d54f coredevice/suservo: Adjust T_CYCLE to match gateware
See GitHub #1338.
2019-07-17 00:20:22 +01:00
34222b3f38 wrpll: encode thls program 2019-07-09 17:56:14 +08:00
5f461d08cd wrpll: add simple thls compiler 2019-07-09 16:07:31 +08:00
f7e10759dc suservo: note requirement to stop servo when accessing state
As already mentioned in the gateware.

One alternative would be to detect address collisions and
stall the read for one cycle.

Note that there will in general not be a consistent view of the servo
state unless the servo is stopped.

close #1337
2019-07-08 18:37:42 +02:00
e4fff390a8 si590 -> si549
Had mistaken the part numbers.
2019-07-07 09:39:55 +08:00
dceb5ae501 wrpll: Si590 I2C mux, CDC 2019-07-05 23:42:37 +08:00
f8dba7ae35 rtio: use BlindTransfer from Migen 2019-07-05 18:46:18 +08:00
4d01410ce5 install-with-conda: notes on proxy 2019-07-04 14:04:32 +02:00
8407c526e8 install-with-conda: de-prioritize conda-forge 2019-07-04 11:19:55 +02:00
5a9bb0ecba runtime: fix incorrect 'RTIO clock failed' report 2019-06-24 23:33:13 +08:00
David Nadlinger
8bf9640185 coredevice/suservo: Fix output IIR state width in docstring 2019-06-21 11:27:39 +02:00
David Nadlinger
34f48f57cc coredevice/suservo: Fix {get,set}_y_mu() scaling
Previously, Channel.set_y(1) would set the output to -1 instead.
2019-06-21 11:27:39 +02:00
f6edceb23d kasli_tester: cleanup/fix test skipping 2019-06-21 16:00:14 +08:00
whitequark
b8b9fa51bd libdyld: accept objects with no rela relocations. 2019-06-17 06:43:34 +00:00
David Nadlinger
0353966ef7 gateware/suservo: Sign-extend data on RTIO read-back
See GitHub #1327 for original patch by Brad Bondurant.
2019-06-14 23:46:16 +01:00
David Nadlinger
720838a23e gateware/suservo: Avoid magic number for activation delay width
Mostly for documentation purposes; 8 bits ought to be enough for
everyone.
2019-06-14 23:45:40 +01:00
53789ba9aa tester: handle urukul switch differences 2019-06-14 10:54:00 +00:00
6655e567df ddb_template: urukul fixes
* fix/add sw (ad9912 and ad9910)
* allow pll_n to be changed
2019-06-14 10:53:03 +00:00
53c778ae2d runtime: fix previous commit 2019-06-14 15:53:01 +08:00
a947867887 runtime: support Kasli Si5324 bypass via rtio_clock=e 2019-06-14 15:48:05 +08:00
66a66b03b4 style 2019-06-14 15:29:16 +08:00
87ce24e867 runtime: refactor startup and RTIO clocking initialization 2019-06-14 15:26:30 +08:00
43e58c939c sayma: drop MasterDAC
This seemed like a good idea then, but it introduces complexity, corner cases, and additional testing difficulties.

Now Sayma works fine with Kasli as a master, which is simpler.
2019-06-14 14:06:16 +08:00
b04e15741b drop SI5324_SAYMA_REF 2019-06-14 14:03:48 +08:00
995a4428e7 attempt to fix disappearing 'question' issue template (2) 2019-06-14 11:37:00 +08:00
6b20d50639 attempt to fix disappearing 'question' issue template 2019-06-14 11:36:03 +08:00
c68581537b remove outdated releasing instructions (#1326) 2019-06-14 11:31:41 +08:00
2183dcf23e update contributing and issue instructions 2019-06-14 11:31:41 +08:00
636b4cae5a tester: urukul single-eem mode 2019-06-13 12:48:42 +00:00
591de0e579 ddb_template: support urukul single-eem mode 2019-06-13 12:19:12 +00:00
967d192cbe ddb_template: wrong copy paste comma 2019-06-13 11:30:22 +00:00
8853cf8df9 dashboard: work around disappearing TTL/DDS panel bug. Closes #1307 2019-06-13 18:41:42 +08:00
1a898c423a aqctl_corelog: filter log messages. Closes #1316 2019-06-13 18:17:52 +08:00
836dc9b927 RELEASE_NOTES: remove '5.0' section (#1326) 2019-06-13 18:15:50 +08:00
834d03527b examples/dds_setter: fix RTIO underflow 2019-06-13 18:07:39 +08:00
e3c58d5872 remove outdated kc705 examples 2019-06-13 18:06:26 +08:00
5008302f88 add major version file (#1326) 2019-06-13 14:00:44 +08:00
74e4b01201 urukul: document consequences of incorrect CPLD clock settings 2019-06-11 11:12:12 +08:00
adf3df2bb5 suservo coredevice driver: mask ftw to avoid erroneous sign extension 2019-06-03 21:40:04 +02:00
704b5c6305 manual: stop using cloud mathjax
cloudflare also uses cookies.
2019-05-22 19:17:14 +08:00
bc2cfd77f5 metlino: add EEMs 2019-05-19 18:16:00 +08:00
cdef50c0dd sayma_amc: Urukul v1.3 2019-05-19 16:54:38 +08:00
34c61db790 artiq_flash: fix Metlino support 2019-05-19 16:37:40 +08:00
88b6496c8c artiq_flash: add Metlino support 2019-05-19 16:30:10 +08:00
9dcaae6395 metlino: use variant output directory 2019-05-19 16:24:51 +08:00
b4779969d0 metlino: work around vivado bug (#1230) 2019-05-19 11:27:27 +08:00
874542f33f add Metlino support 2019-05-19 10:57:43 +08:00
hartytp
cfe1f56f73
suservo: add some more comments to the RTServoMem to clarify the RTIO interface (#1323) 2019-05-17 16:12:35 +01:00