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artiq
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metlino: work around vivado bug (#1230)

pull/1329/head
Sebastien Bourdeauducq 2019-05-19 11:27:27 +08:00
parent 874542f33f
commit b4779969d0
1 changed files with 2 additions and 1 deletions
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3
artiq/gateware/targets/metlino.py
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@ -65,7 +65,8 @@ class Master(MiniSoC, AMPSoC):
self.submodules.drtio_transceiver = gth_ultrascale.GTH(
clock_pads=platform.request("cdr_clk_clean", 0),
data_pads=[platform.request("mch_fabric_d", i) for i in range(12)],
# use only a few channels to work around Vivado bug
data_pads=[platform.request("mch_fabric_d", i) for i in range(3)],
sys_clk_freq=self.clk_freq,
rtio_clk_freq=rtio_clk_freq)
self.csr_devices.append("drtio_transceiver")