si590 -> si549

Had mistaken the part numbers.
2019-07-07 09:39:55 +08:00 · 2019-07-07 09:39:55 +08:00 · e4fff390a8
parent dceb5ae501
commit e4fff390a8
1 changed files with 1 additions and 1 deletions
--- a/artiq/gateware/wrpll/si549.py
+++ b/artiq/gateware/wrpll/si549.py
@ -25,7 +25,7 @@ class ADPLLProgrammer(Module):
        self.sda_oe.attr.add("no_retiming")


-class Si590(Module, AutoCSR):
+class Si549(Module, AutoCSR):
    def __init__(self, pads):
        self.gpio_enable = CSRStorage(reset=1)
        self.gpio_in = CSRStatus(2)