Commit Graph

5648 Commits

Author SHA1 Message Date
Sebastien Bourdeauducq 98489d9739 conda: bump migen/misoc (#854) 2018-02-23 21:46:51 +08:00
Florent Kermarrec 5b0f9cc6fd drtio/transceiver/gth: fix single transceiver case 2018-02-23 12:15:47 +01:00
Robert Jördens cff85ee13b novogorny: simplify and fix coefficient 2018-02-23 10:09:44 +01:00
Florent Kermarrec b4ba71c7a4 drtio/transceiver/gth: implement tx multi lane phase alignment sequence (fix merge issue...) 2018-02-23 08:37:05 +01:00
Florent Kermarrec 820c834251 drtio/transceiver/gth: implement tx multi lane phase alignment sequence 2018-02-22 22:14:15 +01:00
Robert Jördens bc5e949bb4 novogorny: fix gain register length 2018-02-22 18:45:55 +00:00
Robert Jördens 1452cd7447 novogorny: add coredevice driver and test with Kasli
m-labs/artiq#687
2018-02-22 17:19:51 +01:00
Robert Jördens 74517107f0 ad9912: add slack after prodid read 2018-02-22 17:19:51 +01:00
Robert Jördens 3b7971d15d kasli: spelling 2018-02-22 17:19:51 +01:00
Robert Jördens 771bf87b56 kc705: port amc101_dac/spi0 and sma_spi to spi2 2018-02-22 17:19:51 +01:00
whitequark 21b1757bfd Fix e8d21adf3.
As usual, conda documentation does not provide a clear explanation
of what the options do...
2018-02-22 13:26:42 +00:00
whitequark e8d21adf30 conda: turn off binary prefix detection everywhere.
This just adds garbage to logs and serves no useful purpose.
2018-02-22 12:55:47 +00:00
whitequark 8938b69559 conda: simplify recipes.
conda-build appears to no longer require the workaround with
environ.get("GIT_*", "") to work.
2018-02-22 12:45:27 +00:00
Robert Jördens d4a10dcbd4 urukul: fix example 2018-02-22 11:28:50 +01:00
Robert Jördens e8d4db1ccf coreanalyzer: add spi2 support
m-labs/artiq#926
2018-02-22 11:28:46 +01:00
Robert Jördens f8e6b4f4e3 ad5360: port to spi2
* kc705 nist_clock target gateware
* coredevice driver
* moninj code
* test/example/device_db

This is untested as we don't have a AD5360 board right now.
Will be tested with Zotino v1.1

m-labs/artiq#926
2018-02-22 10:25:46 +01:00
whitequark d83ae0bc6a conda: use the outputs section to dynamically name packages. 2018-02-22 09:25:22 +00:00
Sebastien Bourdeauducq c3b8fe06eb conda/artiq-board: use 'firmware' to encompass runtime and satman 2018-02-22 15:30:26 +08:00
Sebastien Bourdeauducq 96423882f2 fix 4d6619f3b 2018-02-22 15:27:54 +08:00
whitequark 10c02afd9c conda: merge all board packages except sayma_rtm into one.
Fixes #923.
2018-02-22 07:22:33 +00:00
Sebastien Bourdeauducq fa0d929b4d drtio: reorganize RX synchronizers 2018-02-22 15:21:23 +08:00
Sebastien Bourdeauducq e5de5ef473 kasli: use deterministic RX synchronizer
Could not reproduce the "fully broken bitstream" bug.
2018-02-22 15:18:09 +08:00
Sebastien Bourdeauducq 4d6619f3bc satman: send ResetAck 2018-02-22 15:17:44 +08:00
Robert Jördens a5ad1dc266 kc705: fix sdcard miso pullup 2018-02-21 19:41:05 +01:00
Robert Jördens 0d8145084d test_spi: move to new spi2 core 2018-02-21 19:41:05 +01:00
Robert Jördens 898bad5abc spi2: fixes 2018-02-21 19:41:05 +01:00
Florent Kermarrec 5eda894db4 firmware/libboard/sdram: increase read_delays dead zone to 32 on KU 2018-02-21 19:36:37 +01:00
Sebastien Bourdeauducq be704b1533 RELEASE_NOTES: mention short options for artiq_flash 2018-02-22 01:32:12 +08:00
whitequark 96f697ec96 firmware: update compiler_builtins to unbreak __gtdf2.
Fixes #883.
2018-02-21 15:21:48 +00:00
Robert Jördens a63fd306af urukul: use spi2
* switch kc705 and kasli targets to spi2 gateware on urukul
* rewrite urukul, ad9912, ad9910
* update example experiments, device_dbs
2018-02-21 15:00:28 +00:00
Robert Jördens 37a0d6580b spi2: add RTIO gateware and coredevice driver
1006218997
2018-02-21 13:37:36 +00:00
Robert Jördens 91a4a7b0ee kasli: free run si5324 on opticlock for now 2018-02-21 13:37:29 +00:00
Robert Jördens 7a1d71502a ttl_serdes_7series: drive IBUF and INTERM disables from serdes 2018-02-21 13:37:29 +00:00
Robert Jördens 476e4fdd56 ttl_serdes_7series: disable IBUF and INTERM when output 2018-02-21 13:37:29 +00:00
Florent Kermarrec afc16a67b6 firmware/liboard/sdram.rs: iterate read multiple times in read_delays to avoid false positives 2018-02-21 14:15:35 +01:00
whitequark 86ceee570f compiler: reject calls with unexpected keyword arguments.
Fixes #924.
2018-02-21 11:37:12 +00:00
Sebastien Bourdeauducq 7986391422 manual: update Kasli section 2018-02-21 12:04:14 +08:00
Sebastien Bourdeauducq 6c4681e7d2 manual: fix minor errors 2018-02-21 11:57:57 +08:00
Sebastien Bourdeauducq 932fa884cc conda: add recipes for Kasli DRTIO 2018-02-21 11:15:01 +08:00
Sebastien Bourdeauducq eed64a6d6b conda: fix openocd dependency 2018-02-21 10:35:31 +08:00
Sebastien Bourdeauducq f060d6e1b3 drtio: increase A7 clock aligner check period 2018-02-20 18:50:35 +08:00
Sebastien Bourdeauducq 738654c783 drtio: support remote RTIO resets 2018-02-20 18:48:54 +08:00
Sebastien Bourdeauducq f15b4bdde7 style 2018-02-20 18:47:59 +08:00
Sebastien Bourdeauducq 7d9c7ada71 drtio: fix test infinite loop 2018-02-20 17:42:00 +08:00
Sebastien Bourdeauducq ad2c9590d0 drtio: rewrite/fix reset and link bringup/teardown 2018-02-20 17:26:43 +08:00
Robert Jördens bfabf3c906 conda: bump migen (9c3a301) 2018-02-19 13:07:17 +00:00
Robert Jördens 7e02d8245c kasli: false paths
* don't bother with the round trip OSERDESE2 -> ... -> pad -> ... ->
  ISERDESE2
* clock groups with derived clocks c.f. migen 9c3a301
2018-02-19 13:05:11 +00:00
Sebastien Bourdeauducq 0f4549655b sayma: use Xilinx RX synchronizer
Cannot be used on Kasli, this breaks the bitstream entirely (nothing on UART).
2018-02-19 17:49:53 +08:00
Sebastien Bourdeauducq 52049cf36a drtio: add Xilinx RX synchronizer 2018-02-19 17:49:43 +08:00
Sebastien Bourdeauducq 3bc575bee7 drtio: add missing define for Sayma master 2018-02-19 17:11:21 +08:00