8adef12781
runtime: refactor ttl*()
...
* remove rt2wb_output
* remove ttl_*() ttl.c ttl.h
* use rtio_output() and rtio_input_timestamp()
* adapt coredevice/compiler layer
* adapt bridge to not artiq_raise_from_c()
2016-03-01 16:36:59 +01:00
aa10791ddf
rtio: rm rtio_write_and_process_status
2016-03-01 15:40:35 +01:00
29776fae3f
coredevice.spi: unused import
2016-03-01 15:38:40 +01:00
324660ab40
rt2wb, exceptions: remove RTIOTimeout
...
Assume that rt2wb transactions either collide and are then
reported (https://github.com/m-labs/artiq/issues/308 ) or that
they complete and the delay with which they complete does not matter.
If a transaction is ack'ed with a delay because the WB core's downstream
logic is busy, that may lead to a later collision with another WB
transaction.
2016-03-01 14:44:07 +01:00
c2fe9a08ae
gateware.spi: delay only writes to data register, update doc
2016-03-01 14:14:38 +01:00
whitequark
7e16da4a77
transforms.llvm_ir_generator: ignore assignments of None ( fixes #309 ).
2016-03-01 12:26:42 +00:00
c7d48a1765
coredevice/TTLOut: add dummy output function
2016-03-01 19:03:10 +08:00
18efca0f0a
Merge branch 'master' of github.com:m-labs/artiq
2016-03-01 14:49:16 +08:00
b0526c3354
protocols/pipe_ipc: fix resource leak on Windows
2016-03-01 14:49:04 +08:00
whitequark
dc70029b91
transforms.asttyped_rewriter: set loc for ForT ( fixes #302 ).
2016-03-01 05:22:12 +00:00
f2ec8692c0
nist_clock: disable spi1/2
2016-03-01 01:52:46 +01:00
7d7a710a56
runtime/rt2wb: use input/output terminology and add (async) input
2016-03-01 00:35:56 +01:00
764795a8fe
examples: update device_db for nist_clock spi
2016-02-29 22:32:53 +01:00
da22ec73df
gateware.spi: rework wb bus sequence
2016-02-29 22:22:08 +01:00
12252abc8f
nist_clock: rename spi*.ce to spi*.cs_n
2016-02-29 22:21:18 +01:00
7ef21f03b9
nist_clock: add SPIMasters to spi buses
2016-02-29 22:19:39 +01:00
8fa98f6486
doc: use term 'gateware'
...
FPGA newcomers are not used to the term 'bitstream'. To insist that this file
is the result of the gateware compilation and thus the binary FPGA format,
add the term 'gateware' as a prefix.
2016-02-29 20:50:45 +01:00
7ab7f7d75d
Merge branch 'master' into spimaster
...
* master:
artiq_flash: use term 'gateware'
targets/kc705-nist_clock: add clock generator on LA32 for testing purposes
doc: insist that output() must be called on TTLInOut. Closes #297
doc: update install instructions
coredevice: do not give up on UTF-8 errors in log. Closes #300
use m-labs setup for defaults
fix indentation
2016-02-29 20:47:52 +01:00
6dd1eb2e92
artiq_flash: use term 'gateware'
2016-02-29 20:45:41 +01:00
6c899e6ba6
runtime/rtio: fix rtio_input_wait(), add RTIOTimeout
2016-02-29 19:49:15 +01:00
16537d347e
coredevice.spi: cleanup
2016-02-29 19:48:26 +01:00
ecedbbef4c
runtime/ttl: use rtio_output and rtio_input_wait
2016-02-29 19:20:07 +01:00
5dae9f8aa8
runtime: refactor rt2wb/dds
2016-02-29 19:16:29 +01:00
d3c94827eb
runtime/ttl: simplify ttl_get() a bit
2016-02-29 17:58:54 +01:00
e11366869d
coredevice/spi: clean up api
2016-02-29 17:54:42 +01:00
5fad570f5e
targets/kc705-nist_clock: add clock generator on LA32 for testing purposes
2016-03-01 00:35:26 +08:00
dd570720ac
gateware.spi: ack only in cycles
2016-02-29 17:29:37 +01:00
a1e1f2b387
doc: insist that output() must be called on TTLInOut. Closes #297
2016-03-01 00:28:40 +08:00
d0d56bd3fe
doc: update install instructions
2016-03-01 00:19:55 +08:00
a0083f4501
Revert "gateware/rt2wb: only input when active"
...
This reverts commit 1b08e65fa1
2016-02-29 16:44:11 +01:00
cb8815cc65
Revert "gateware/rt2wb: support combinatorial ack"
...
This reverts commit f73228f248
2016-02-29 16:44:04 +01:00
f73228f248
gateware/rt2wb: support combinatorial ack
2016-02-29 15:40:55 +01:00
4467f91cbf
coredevice: do not give up on UTF-8 errors in log. Closes #300
2016-02-29 22:21:10 +08:00
1b08e65fa1
gateware/rt2wb: only input when active
2016-02-29 14:56:29 +01:00
6903a1d88a
runtime/rt2wb: accurate exception strings
2016-02-29 14:56:04 +01:00
c226aeb0d4
coredevice/spi: read_sync read bit
2016-02-29 14:55:29 +01:00
572c49f475
use m-labs setup for defaults
2016-02-29 21:35:23 +08:00
785691ab98
fix indentation
2016-02-29 21:32:48 +08:00
df7d15d1fe
runtime: refactor spi into rt2wb
2016-02-29 13:54:36 +01:00
eb01b0bfee
gateware.spi: cleanup doc
2016-02-29 12:41:30 +01:00
aeae565d35
runtime/spi: don't apply channel offset
2016-02-29 11:53:36 +01:00
948fefa69a
gateware.spi: style
2016-02-29 11:48:29 +01:00
ad34927b0a
spi: RTIO_SPI_CHANNEL -> RTIO_FIRST_SPI_CHANNEL
2016-02-29 11:35:49 +01:00
5480099f1b
gateware.spi: rewrite counter bias for timing
2016-02-29 02:28:19 +01:00
9a1d6a51a4
gateware.spi: shorten counters
2016-02-29 01:51:33 +01:00
a4504905bd
Merge remote-tracking branch 'm-labs/master' into spimaster
...
* m-labs/master:
Fix tests.
types.TypePrinter: don't waste screen space on empty attribute lists.
Revert wrong parts of 6bd16e44
2016-02-29 00:49:13 +01:00
8b2b278457
spi: add coredevice support
2016-02-29 00:44:48 +01:00
d63a63531a
spi: add runtime support
2016-02-29 00:38:36 +01:00
8d7e92ebae
pipistrello: set RTIO_SPI_CHANNEL
2016-02-29 00:37:00 +01:00
9a881aa430
gateware.spi: simpler clk bias
2016-02-29 00:36:18 +01:00
