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mirror of https://github.com/m-labs/artiq.git synced 2024-12-25 11:18:27 +08:00

artiq_flash: use term 'gateware'

This commit is contained in:
Robert Jördens 2016-02-29 20:45:41 +01:00
parent 5fad570f5e
commit 6dd1eb2e92

View File

@ -6,7 +6,6 @@ import os
import subprocess
import tempfile
import artiq
from artiq import __artiq_dir__ as artiq_dir
from artiq.frontend.bit2bin import bit2bin
@ -18,13 +17,13 @@ def get_argparser():
epilog="""\
Valid actions:
* proxy: load the flash proxy bitstream
* bitstream: write bitstream to flash
* proxy: load the flash proxy gateware bitstream
* gateware: write gateware bitstream to flash
* bios: write bios to flash
* runtime: write runtime to flash
* storage: write storage image to flash
* load: load bitstream into device (volatile but fast)
* start: trigger the target to (re)load its bitstream from flash
* load: load gateware bitstream into device (volatile but fast)
* start: trigger the target to (re)load its gateware bitstream from flash
Prerequisites:
@ -42,7 +41,7 @@ Prerequisites:
parser.add_argument("-f", "--storage", help="write file to storage area")
parser.add_argument("-d", "--dir", help="look for files in this directory")
parser.add_argument("ACTION", nargs="*",
default="proxy bitstream bios runtime start".split(),
default="proxy gateware bios runtime start".split(),
help="actions to perform, default: %(default)s")
return parser
@ -55,7 +54,7 @@ def main():
"kc705": {
"chip": "xc7k325t",
"start": "xc7_program xc7.tap",
"bitstream": 0x000000,
"gateware": 0x000000,
"bios": 0xaf0000,
"runtime": 0xb00000,
"storage": 0xb80000,
@ -63,7 +62,7 @@ def main():
"pipistrello": {
"chip": "xc6slx45",
"start": "xc6s_program xc6s.tap",
"bitstream": 0x000000,
"gateware": 0x000000,
"bios": 0x170000,
"runtime": 0x180000,
"storage": 0x200000,
@ -83,23 +82,23 @@ def main():
proxy_base = "bscan_spi_{}.bit".format(config["chip"])
proxy = None
for p in [opts.dir, os.path.expanduser("~/.migen"),
"/usr/local/share/migen", "/usr/share/migen"]:
"/usr/local/share/migen", "/usr/share/migen"]:
proxy_ = os.path.join(p, proxy_base)
if os.access(proxy_, os.R_OK):
proxy = "jtagspi_init 0 {}".format(proxy_)
break
if not proxy:
raise SystemExit(
"proxy bitstream {} not found".format(proxy_base))
"proxy gateware bitstream {} not found".format(proxy_base))
prog.append(proxy)
elif action == "bitstream":
elif action == "gateware":
bin = os.path.join(opts.dir, "top.bin")
if not os.access(bin, os.R_OK):
bin = tempfile.mkstemp()[1]
bit = os.path.join(opts.dir, "top.bit")
conv = True
prog.append("jtagspi_program {} 0x{:x}".format(
bin, config["bitstream"]))
bin, config["gateware"]))
elif action == "bios":
prog.append("jtagspi_program {} 0x{:x}".format(
os.path.join(opts.dir, "bios.bin"), config["bios"]))