morgan
44cfacf2c4
Firmware: frequency multipler for WRPLL
...
si549: add bit bang mmcm dynamic configuration
si549: add 125Mhz wrpll refclk setup
2024-05-29 16:52:08 +08:00
morgan
0ac0e08170
Firmware: WRPLL
...
wrpll: add tag collector to process gtx & main tags
wrpll: add frequency counter to set BASE_ADPLL
wrpll: add TAG_OFFSET and calibration for Satman
wrpll: add 100MHz & 125MHz fixed point low pass filter
wrpll: add main & helper PLL
2024-05-28 17:27:49 +08:00
morgan
5d9bc930fe
Firmware: si549
...
si549: add bit bang i2c
si549: add si549 programming
si549: add main & helper setup
2024-05-28 17:27:49 +08:00
mwojcik
688e643078
firmware: update rust to 2021-09-01 nightly
2024-05-17 15:36:56 +08:00
mwojcik
b1c305fd11
drtioaux: adjust firmware for multiple buffers
2024-04-25 10:46:57 +08:00
linuswck
372008cb66
Firmware: AD9117 Add check presence of clk comment
2023-09-18 13:04:51 +08:00
linuswck
85abb1da2c
Firmware: Set DACs RETIMER-CLK to Phase 1 Shuttler
...
- Intend to maintain the same pipeline latency across all DACs on Shuttler
- Force the RETIMER-CLK to be PHASE 1 on all DACs
- See Issue #2200 for details
2023-09-18 12:52:21 +08:00
linuswck
ccb140a929
Firmware: Add AD9117 DAC Startup Seq for shuttler
2023-09-11 15:07:47 +08:00
linuswck
dc97d3aee6
drtio-eem: CONFIG_EEM_TRANSCEIVERS -> CONFIG_EEM_DRTIO_COUNT
2023-08-25 11:49:39 +08:00
occheung
64d3f867a0
add DRTIO-over-EEM PHY
...
for EFC and perhaps Phaser
2023-08-09 23:59:40 +00:00
Sebastien Bourdeauducq
0a37a1a4c1
Merge branch 'syncrtio'
2023-01-12 12:58:19 +08:00
Sebastien Bourdeauducq
cf2a4972f7
remove WRPLL
2023-01-06 17:53:11 +08:00
Sebastien Bourdeauducq
5da9794895
remove Sayma and Metlino support
2023-01-06 17:41:12 +08:00
David Nadlinger
1e0102379b
firmware: Rename si5324 crystal_{ref -> as_ckin2} [nfc]
...
This would have made the issue in the pre-740543d4e code
much more obvious (the config option by itself does not
have any effect on the choice of active reference input).
2022-12-17 02:17:12 +00:00
David Nadlinger
ceabeb8d84
firmware: Fix Si5324 initialisation for satellites
...
Commit 740543d4e2
had unintentionally broken DRTIO
satellites, as si5324::setup is also used there. This
imports setup_si5324_as_synthesizer() from artiq-zynq,
where the input selection was already explicitly done.
GitHub: Fixes #2028 .
2022-12-17 02:17:06 +00:00
David Nadlinger
740543d4e2
firmware: Fix Kasli v2 runtime rtio_clock selection
...
SI5324_EXT_REF now only controls the (deprecated) fallbacks
for when the rtio_clock option is not set.
2022-12-04 02:23:38 +00:00
Sebastien Bourdeauducq
a159ef642d
drtio: demote default routing table message to info
2022-03-16 21:22:35 +08:00
Spaqin
a85b4d5f5e
I2C API for PCA9547 support ( #1860 )
2022-03-01 15:07:53 +08:00
occheung
9423428bb0
drtio: fix crc32 offset address
2021-11-24 12:00:56 +08:00
occheung
03b803e764
firmware: adjust csr separation
2021-11-08 16:59:08 +08:00
occheung
eecd825d23
firmware: suppress warning
2021-09-10 13:25:12 +08:00
occheung
1da0554a49
pcr: purge
2021-09-10 13:25:12 +08:00
occheung
7542105f0f
board_misoc: remove pcr
...
VexRiscv seems to not support additional hardware performance counter, at least I have not seen any documentation on how to use it.
2021-09-10 13:25:12 +08:00
Sebastien Bourdeauducq
92fd705990
increase memory allocated to comms CPU
...
See discussion in #1612 .
2021-02-21 19:06:12 +08:00
Sebastien Bourdeauducq
ea95d91428
wrpll: separate collector reset
2020-11-09 17:57:13 +08:00
hartytp
e6ff2ddc32
wrpll: add more diagnostics in firmware and adapt to recent gateware changes
2020-10-08 15:32:27 +08:00
Sebastien Bourdeauducq
4e9a529e5a
kasli: integrate WRPLL
2020-05-07 21:34:02 +08:00
Sebastien Bourdeauducq
ffd3172e02
sayma: move SYSREF DDMTD to RTM ( #795 )
2020-04-06 00:01:28 +08:00
Sebastien Bourdeauducq
52ec849008
sayma: fix sysref_delay_dac
2020-02-05 19:04:01 +08:00
Sebastien Bourdeauducq
bf9f4e380a
si5324: program I2C mux on Metlino
2020-02-03 18:07:59 +08:00
Sebastien Bourdeauducq
ec03767dcf
sayma: improve DAC status report
2020-01-20 18:22:06 +08:00
Sebastien Bourdeauducq
3242e9ec6c
wrpll: loop test
2020-01-13 22:31:57 +08:00
Sebastien Bourdeauducq
d5895b8999
wrpll: adpll -> set_adpll
2020-01-13 20:46:36 +08:00
Sebastien Bourdeauducq
e7ef23d30c
wrpll: use CONFIG_CLOCK_FREQUENCY and rtio_frequency in trim_dcxos
2020-01-13 20:44:15 +08:00
Sebastien Bourdeauducq
ea3bce6fe3
wrpll: wait for settling time after setting ADPLL
2020-01-13 20:43:34 +08:00
Sebastien Bourdeauducq
e87d864063
wrpll: print ADPLL offsets
2020-01-13 19:32:30 +08:00
Sebastien Bourdeauducq
8edbc33d0e
wrpll: calculate initial ADPLL offsets
2020-01-13 19:29:10 +08:00
Sebastien Bourdeauducq
3f32d78c0e
wrpll: simple ADPLL test
2019-12-31 12:12:29 +08:00
Sebastien Bourdeauducq
bb04b082a7
wrpll: clarify comment
2019-12-31 12:12:29 +08:00
Sebastien Bourdeauducq
642a305c6a
wrpll: remove unnecessary delay
...
Counting now happens in the sys domain with no CDC between counter and CPU.
2019-12-30 20:01:06 +08:00
Sebastien Bourdeauducq
f57f235dca
wrpll: new frequency meter
...
As per Mattermost discussion with Tom.
2019-12-30 19:47:57 +08:00
Sebastien Bourdeauducq
c5137eeb62
firmware: remove legacy hmc542 code
2019-12-20 15:25:55 +08:00
Sebastien Bourdeauducq
6f52540569
wrpll: fix previous commit
2019-12-09 20:13:55 +08:00
Sebastien Bourdeauducq
13486f3acf
wrpll: swap helper/main si549 frequencies
2019-12-09 19:49:34 +08:00
Sebastien Bourdeauducq
4919fb8765
wrpll: print DDMTD helper tags
2019-12-09 17:39:22 +08:00
Sebastien Bourdeauducq
0d4eccc1a5
wrpll: improve debug output
2019-12-09 17:23:09 +08:00
Sebastien Bourdeauducq
f633c62e8d
wrpll: speed up si549 i2c access
2019-12-09 17:22:58 +08:00
Sebastien Bourdeauducq
14e09582b6
wrpll: work around si549 not working when lsdiv=2
2019-12-09 16:20:08 +08:00
Sebastien Bourdeauducq
439576f59d
wrpll: fix Si549 initialization delays
2019-12-09 16:13:57 +08:00
Sebastien Bourdeauducq
0499f83580
wrpll: helper clock sanity check
2019-12-08 23:46:33 +08:00