58ea111b8b
create 5.0.dev
2018-11-20 18:40:12 +08:00
bf50dcf76d
conda: use misoc release
2018-11-20 17:15:53 +08:00
8f9858be4c
ad9914: remove automatic continuous phase compensation (like Urukul)
2018-11-19 22:00:20 +08:00
22a223bf82
examples/master: clean up remnants of early urukul tests
2018-11-19 21:42:41 +08:00
f5befba5c9
conda: bump misoc (attempt to WA conda problem)
2018-11-19 13:24:28 +08:00
53e79f553f
Merge branch 'master' into new
2018-11-19 11:54:50 +08:00
b5cdb1c1e0
try to work around conda problem
2018-11-18 22:32:17 +08:00
a3e0b1c5b4
ad9914,spi2: add warnings about driver state and DMA. Closes #1113
2018-11-17 22:10:20 +08:00
78d4b3a7da
gateware/targets: expose variant lists
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This allows writing scripts that build all variants.
2018-11-17 22:10:20 +08:00
69e699c7bd
ttl: compensate for SED latency in input gating
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Closes #1137
2018-11-17 22:10:20 +08:00
3ad68f65c5
urukul: make get_att_mu() not alter state
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-16 14:56:26 +00:00
d1eee7c0ea
ad9910: ensure sync is driven when required
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close #1194
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-16 13:21:01 +00:00
1b841805f6
Merge branch 'master' into new
2018-11-16 15:20:32 +08:00
de9d21ffc8
nix: use fetchFromGitHub for llvmlite
2018-11-16 15:14:20 +08:00
d3483c1d26
kasli: fix SDRAM read delay reset/wrap issue. Closes #1149
2018-11-15 19:40:35 +08:00
494ffca4d3
gui,scan: add CenterScan Scannable variant
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* parametrized by center/span/step instead of
start/stop/npoints which is more convenient in some applications
* no scan widget support so far
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-15 13:30:43 +08:00
f77a75ab17
test_ad9910: robustify w.r.t. profile synchronization
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-14 08:42:27 +01:00
c3178c2cab
ad9910: profile support
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-14 08:30:28 +01:00
d0cadfeb4b
ad9910: more idiomatic register names
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-14 07:55:01 +01:00
a52d1be140
urukul: expose PROFILE setting
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* add documentation
* add unittest
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-14 07:43:56 +01:00
2af6edb8f5
eem: fix reset/sync in suservo
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-13 13:00:54 +00:00
whitequark
248c1cf7dc
firmware: fix another TOCTTOU race in sync/async RPC code.
2018-11-13 00:58:20 +08:00
whitequark
68aad3e482
firmware: fix TOCTTOU race in sync/async RPC code.
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Before this commit, the main loop in session code was laid like:
1. process_kern_queued_rpc
2. process_host_message
3. process_kern_message
If a host message (such as an RPC reply) caused the kernel to exit,
then any async RPCs would not complete, since RunFinished immediately
shuts down the kernel.
Fix this by reordering 1 and 2.
2018-11-13 00:57:09 +08:00
whitequark
dd829afebd
firmware: fix another TOCTTOU race in sync/async RPC code.
2018-11-12 15:42:07 +00:00
whitequark
583bba8777
Revert "firmware: workaround for RPC failures"
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This reverts commit 59033d2588
2018-11-12 15:36:36 +00:00
whitequark
0edae64afb
firmware: fix TOCTTOU race in sync/async RPC code.
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Before this commit, the main loop in session code was laid like:
1. process_kern_queued_rpc
2. process_host_message
3. process_kern_message
If a host message (such as an RPC reply) caused the kernel to exit,
then any async RPCs would not complete, since RunFinished immediately
shuts down the kernel.
Fix this by reordering 1 and 2.
2018-11-12 15:30:59 +00:00
59033d2588
firmware: workaround for RPC failures
2018-11-12 19:51:54 +08:00
84a6b3d09b
runtime: fix DMA recording after now-pinning
2018-11-10 14:14:55 +08:00
a4997c56cf
ad9910: simplify edge detection logic
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-09 18:54:34 +00:00
e927551827
manual: add highfinesse-net port
2018-11-09 19:39:25 +01:00
14b6b63916
ad9910: rewire io_delay tuning
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This now reliably locates the SYNC_CLK-IO_UPDATE edge by doing two
scans at different delays between start and stop IO_UPDATE.
It also works well when one delay is very close to the edge.
And it correctly identifies which (start or stop) pulse hit or crossed
the SYNC_CLK edge.
for #1143
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-09 18:38:27 +00:00
1f7858b80b
test/dsp: fix rtio_output
2018-11-09 22:11:44 +08:00
e509ab8553
test/dsp: use absolute import path
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Avoids "ImportError: attempted relative import with no known parent package"
when doing a simple "python -m unittest test_XXX.py".
2018-11-09 22:10:46 +08:00
fe3d6661eb
manual: kasli device name for zadig on windows
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-09 15:00:59 +01:00
38c6878d49
urukul: mention min/max attenuation
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-09 13:32:05 +01:00
e565ca6b82
urukul: slow down att write to datasheet limit
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-09 13:23:06 +01:00
998be50f07
urukul: handle MSB in att_reg
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-09 13:21:14 +01:00
c990b5e4f1
Merge remote-tracking branch 'origin/master' into new
2018-11-08 20:21:56 +08:00
a0cc7311ad
test: tighten test_pulse_rate
2018-11-08 20:17:55 +08:00
0bee43aa58
sawg: use new rtio_output() API
2018-11-08 20:16:30 +08:00
bec25cbaa0
suservo: use new rtio_output() API
2018-11-08 20:13:14 +08:00
e8d58b35b4
spi2: use new rtio_output() API
2018-11-08 20:12:30 +08:00
d18546550e
grabber: use new rtio_output() API
2018-11-08 19:15:50 +08:00
2549e623c1
ad9914: use new rtio_output() API
2018-11-08 19:15:44 +08:00
David Nadlinger
9740032a94
firmware: Fix dma_record_output_wide
2018-11-08 11:06:43 +00:00
f74dda639f
drtio: 8-bit address
2018-11-08 18:36:20 +08:00
8caea0e6d3
gateware,runtime: optimize RTIO kernel interface further
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* now pinning (TODO: atomicity)
* for inputs, merge request and timeout registers
2018-11-08 18:29:24 +08:00
fcb611d1d2
test_ad9910: don't expect large SYNC_IN delay margins
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sinara-hw/Urukul#16
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-07 18:18:35 +01:00
aadf5112b7
rtio: remove incorrect comment
2018-11-08 00:02:44 +08:00
fae95e73ad
ttl: use optimized rtio_output API
2018-11-07 23:41:43 +08:00
