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c29e6312fe
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examples/dds_test: use GHz
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2014-08-13 18:30:42 +08:00 |
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677117abfb
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examples/compiler_test: use MPO and add dds_sysclk
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2014-08-13 18:17:08 +08:00 |
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eb4054d976
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sim: use MPO
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2014-08-13 18:16:40 +08:00 |
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2135e37dca
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compiler: use value_to_ast(x) instead of ast.Num(x)
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2014-08-13 18:02:24 +08:00 |
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3446c1f914
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language/core: remove unneeded import
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2014-08-13 18:00:38 +08:00 |
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899a034204
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compiler/lower_time: adapt to new unit system
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2014-08-13 17:59:53 +08:00 |
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9cbf31153a
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compiler/ir: compile fractions with denominator==1 as integers
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2014-08-13 17:58:48 +08:00 |
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70fbc6ad56
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compiler/interleave: use eval_constant from tools
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2014-08-13 17:58:06 +08:00 |
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5481baac1d
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compiler/inline: cleanup reference manager, recognize Fraction
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2014-08-13 17:56:55 +08:00 |
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fe5b3cc67e
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compiler/fold_constants: use eval_constant from tools
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2014-08-13 17:54:58 +08:00 |
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0145e52d4b
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compiler/tools: add eval_constant and Fraction support
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2014-08-13 17:54:22 +08:00 |
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a2691ab07a
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language/units: do not quantize
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2014-08-13 17:52:01 +08:00 |
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98b23eadf8
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examples/coredev_test: create GPIOOut with correct MPO syntax
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2014-08-09 14:32:10 +08:00 |
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1ed808e848
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soc/target: share base PPro design with MiSoC
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2014-08-03 12:26:15 +08:00 |
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d918422457
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Add logo
|
2014-07-31 21:41:50 +08:00 |
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9e4bc35354
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soc/rtio: input support
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2014-07-25 16:23:35 -06:00 |
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6b6b44b924
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soc/rtio: mux OE
|
2014-07-25 11:09:26 -06:00 |
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f03ae5e5b0
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soc/rtio: separate PHY, add OE and fine timestamp in FIFO
|
2014-07-24 23:50:20 -06:00 |
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f390e9a7d1
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corecom_serial: add CRC for kernel
|
2014-07-23 19:12:22 -06:00 |
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06cc9302f8
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soc/runtime: fix DDS programming
|
2014-07-23 17:10:49 -06:00 |
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b2bb837d22
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compiler/ir: add binary AND and OR
|
2014-07-23 17:10:12 -06:00 |
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1d8eb121b3
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examples: DDS demo
|
2014-07-23 17:09:49 -06:00 |
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52e8d4150b
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devices/dds_core: use MPO and runtime IF
|
2014-07-23 11:50:23 -06:00 |
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ba088614d8
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runtime: add dds_program
|
2014-07-23 11:49:48 -06:00 |
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d922c3db7e
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compiler/ir: replace quantities with their integer value
|
2014-07-23 11:48:43 -06:00 |
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1b52941381
|
compiler/ir: support shifts
|
2014-07-23 11:48:15 -06:00 |
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005d66c7cd
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soc/dds: fix timing
|
2014-07-22 17:44:41 -06:00 |
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2358b218bf
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soc: add DDS interface core
|
2014-07-22 11:37:53 -06:00 |
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dec7c1438f
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runtime: implement rtio_sync syscall
|
2014-07-22 11:36:54 -06:00 |
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5573cf3688
|
soc: add tester IO
|
2014-07-22 10:45:59 -06:00 |
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8769066e89
|
compiler/devices: set initial time
|
2014-07-21 13:22:07 -06:00 |
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cdda1beea8
|
soc/rtio: refactor, share counter and underflow detector
|
2014-07-21 13:17:21 -06:00 |
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ede3667fd3
|
soc/target: use only 8 TTL channels for now
|
2014-07-20 18:38:41 -06:00 |
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9b5c28af82
|
examples: add RTIO demo
|
2014-07-20 18:38:10 -06:00 |
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c5dba6c3b8
|
examples/time_test: add loop
|
2014-07-20 18:36:31 -06:00 |
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041540089a
|
devices: add RTIO support
|
2014-07-20 18:36:17 -06:00 |
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043c4345e5
|
soc/runtime: add RTIO support
|
2014-07-20 18:28:56 -06:00 |
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|
1885a87187
|
devices/gpio_core: use MPO
|
2014-07-20 18:23:53 -06:00 |
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|
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5f58789592
|
rtio: fix FIFO WE
|
2014-07-20 18:22:53 -06:00 |
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|
0cb18d58a8
|
rtio: add FIFO level CSR
|
2014-07-17 19:35:53 -06:00 |
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|
3b4bb41a19
|
add basic output-only untested RTIO core
|
2014-07-16 19:13:11 -06:00 |
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3c47f75726
|
doc: add overview slides
|
2014-07-16 09:46:10 -06:00 |
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abecc5203a
|
examples: demonstrate time on the device
|
2014-07-16 09:45:51 -06:00 |
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a9b96cefbe
|
compiler/ir: support AugAssign
|
2014-07-16 09:43:46 -06:00 |
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591509d31b
|
compiler: lower time transform
|
2014-07-15 11:22:11 -06:00 |
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|
17fab6f024
|
corecom_serial: support ident and runtime environment creation
|
2014-07-15 11:21:31 -06:00 |
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|
6f28ab2cc6
|
devices: let corecom create runtime environment, add dummy corecom
|
2014-07-15 11:20:13 -06:00 |
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|
|
529b83bb58
|
language/core/MPO: new parameter/channel mechanism
|
2014-07-11 01:12:40 +02:00 |
|
|
|
6509f1fd04
|
artiq.language.experiment -> artiq.language.core
|
2014-07-10 18:13:37 +02:00 |
|
|
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5f01b061f7
|
MPO: implicit core
|
2014-07-10 15:38:51 +02:00 |
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