forked from M-Labs/artiq
devices: let corecom create runtime environment, add dummy corecom
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parent
529b83bb58
commit
6f28ab2cc6
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@ -5,7 +5,9 @@ from artiq.compiler.interleave import interleave
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from artiq.compiler.ir import get_runtime_binary
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class Core:
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def __init__(self, runtime_env, core_com):
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def __init__(self, core_com, runtime_env=None):
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if runtime_env is None:
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runtime_env = core_com.get_runtime_env()
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self.runtime_env = runtime_env
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self.core_com = core_com
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@ -0,0 +1,28 @@
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from operator import itemgetter
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from artiq.devices.runtime import LinkInterface
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from artiq.language.units import ns
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class _RuntimeEnvironment(LinkInterface):
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def __init__(self, ref_period):
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self.ref_period = ref_period
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def emit_object(self):
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return str(self.module)
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class CoreCom:
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def get_runtime_env(self):
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return _RuntimeEnvironment(10*ns)
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def run(self, kcode):
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print("================")
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print(" LLVM IR")
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print("================")
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print(kcode)
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def serve(self, rpc_map):
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print("================")
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print(" RPC map")
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print("================")
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for k, v in sorted(rpc_map.items(), key=itemgetter(0)):
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print(str(k)+" -> "+str(v))
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@ -26,7 +26,7 @@ def _str_to_functype(s):
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type_args.append(_chr_to_type[c]())
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return var_arg_fixcount, lc.Type.function(type_ret, type_args, var_arg=var_arg_fixcount is not None)
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class Environment:
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class LinkInterface:
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def set_module(self, module):
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self.var_arg_fixcount = dict()
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for func_name, func_type_str in _syscalls:
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@ -45,6 +45,10 @@ class Environment:
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+ args[fixcount:]
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return builder.call(self.module.get_function_named("__syscall_"+syscall_name), args)
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class Environment(LinkInterface):
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def __init__(self, ref_period):
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self.ref_period = ref_period
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def emit_object(self):
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tm = lt.TargetMachine.new(triple="or1k", cpu="generic")
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return tm.emit_object(self.module)
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@ -28,9 +28,9 @@ class CompilerTest(MPO):
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self.print_done()
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if __name__ == "__main__":
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from artiq.devices import core, dds_core
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from artiq.devices import corecom_dummy, core, dds_core
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coredev = core.Core()
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coredev = core.Core(corecom_dummy.CoreCom())
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exp = CompilerTest(
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core=coredev,
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a=dds_core.DDS(coredev, 0, 0),
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@ -1,5 +1,5 @@
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from artiq.language.core import MPO, kernel
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from artiq.devices import corecom_serial, runtime, core, gpio_core
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from artiq.devices import corecom_serial, core, gpio_core
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class CompilerTest(MPO):
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parameters = "led"
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@ -29,7 +29,7 @@ class CompilerTest(MPO):
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if __name__ == "__main__":
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with corecom_serial.CoreCom() as com:
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coredev = core.Core(runtime.Environment(), com)
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coredev = core.Core(com)
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exp = CompilerTest(
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core=coredev,
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led=gpio_core.GPIOOut(coredev, 0)
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