srenblad/artiq
1
0
Fork 0
forked from M-Labs/artiq
Code Pull Requests Activity

compiler/ir: add binary AND and OR

Browse Source
This commit is contained in:
Sebastien Bourdeauducq 2014-07-23 17:10:12 -06:00
parent 1d8eb121b3
commit b2bb837d22
1 changed files with 5 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
artiq/compiler/ir.py
View File

@ -28,8 +28,12 @@ _binop_to_builder = {
ast.Mult: "mul",
ast.FloorDiv: "sdiv",
ast.Mod: "srem",
ast.LShift: "shl",
ast.RShift: "ashr"
ast.RShift: "ashr",
ast.BitAnd: "and_",
ast.BitOr: "or_",
}
def _emit_expr(env, builder, ns, node):