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446f791180
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firmware: simplify SYSREF DRTIO alignment
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2018-07-26 19:37:59 +08:00 |
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f8c17528e7
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satman: use new SYSREF code
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2018-07-26 16:26:57 +08:00 |
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32c95ac034
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sayma: automated DAC SYSREF phase calibration
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2018-07-26 16:23:55 +08:00 |
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dbcf2fe9b4
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firmware: remove 'chip found' messages on Sayma
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2018-07-26 16:07:37 +08:00 |
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d523d03f71
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sayma: automated FPGA SYSREF phase offset calibration
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2018-07-26 14:53:28 +08:00 |
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0a9d3638ee
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config: add write_int
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2018-07-26 14:49:32 +08:00 |
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19c51c644e
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grabber: cleanup GRABBER_STATE
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2018-07-24 19:08:51 +08:00 |
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fb96c1140e
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grabber: add coredevice driver
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2018-07-24 18:06:44 +08:00 |
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b38c685857
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grabber: fix pix.stb
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2018-07-24 11:32:32 +08:00 |
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60a7e0e40d
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grabber: use usual order of ROI coordinates in cfg addresses
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2018-07-24 10:55:13 +08:00 |
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015c592ab7
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conda: bump jesd204b
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2018-07-21 15:49:40 +08:00 |
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7b75026391
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grabber: add MultiReg to transfer ROI boundaries
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2018-07-21 13:40:12 +08:00 |
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4a4d0f8e51
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grabber: fix missing variable rename
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2018-07-21 13:39:46 +08:00 |
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3638a966e1
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kasli: add false path between RTIO and CL clocks
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2018-07-21 13:26:13 +08:00 |
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031de58d21
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grabber: complete RTIO PHY, untested
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2018-07-21 13:25:47 +08:00 |
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e3ba4b9516
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grabber: minor ROI engine cleanup, export count_len, cap count width to 31
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2018-07-21 13:25:13 +08:00 |
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766d87f626
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doc: artiq_coreconfig → artiq_coremgmt config. Closes #1111
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2018-07-20 11:59:07 +08:00 |
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cab0ba408d
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fmcdio_vhdci_eem: cleanup and document
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2018-07-20 09:57:03 +08:00 |
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d152506ecb
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sayma: update fmcdio_vhdci_eem demo
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2018-07-19 15:47:20 +08:00 |
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8dfcd463aa
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fmcdio_vhdci_eem: naming consistency
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2018-07-19 15:46:04 +08:00 |
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fe93a454d6
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fmcdio_vhdci_eem: fix direction shift register permutation and polarity
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2018-07-19 15:16:21 +08:00 |
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e71cbe53a6
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firmware: cleanup Cargo.lock
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2018-07-18 10:37:43 +08:00 |
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31f4f8792a
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sayma: add Urukul and Zotino to example device_db
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2018-07-18 10:31:55 +08:00 |
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25170a53e5
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sayma: add back Urukul and Zotino
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2018-07-18 10:27:54 +08:00 |
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5e62910a8d
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examples: add Sayma VHDCI DIO
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2018-07-17 23:28:05 +08:00 |
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8b9a8be12a
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fmcdio_vhdci_eem: add dirctl word computation functions
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2018-07-17 23:27:29 +08:00 |
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82145b1263
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examples: sayma_drtio → sayma_masterdac
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2018-07-17 20:32:30 +08:00 |
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c7d96c2223
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conda: bump migen
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2018-07-17 20:30:23 +08:00 |
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7fe76426fe
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fmcdio_vhdci_eem: commit missing part of previous commit
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2018-07-17 20:30:13 +08:00 |
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d4d12e264d
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fmcdio_vhdci_eem: refactor
This allows access to the pin allocation from kernels, which becomes useful
to configure the direction shift register.
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2018-07-17 20:13:59 +08:00 |
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4fdc20bb11
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sayma: disable Urukul and Zotino for now
Ultrascale I/Os are being a pain as usual and the SPI core won't compile.
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2018-07-17 20:08:21 +08:00 |
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8335085fd6
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fmcdio_vhdci_eem: fix cc pins
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2018-07-17 19:50:34 +08:00 |
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8f7c0c1646
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fmcdio_vhdci_eem: fix iostandard
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2018-07-17 19:40:34 +08:00 |
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d724bd980c
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sayma: add EEMs to Master
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2018-07-17 18:58:23 +08:00 |
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a0f2d8c2ea
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gateware: add FMCDIO/EEM adapter definitions
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2018-07-17 18:58:16 +08:00 |
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3645a6424e
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sayma: fix Master build
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2018-07-17 18:56:33 +08:00 |
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9b016dcd6d
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eem: support specifying I/O standard
Xilinx FPGAs require different LVDS I/O standard names depending on I/O bank voltage.
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2018-07-17 18:55:17 +08:00 |
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3168b193e6
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kc705: remove Zotino and Urukul
* use Kasli instead for using EEMs
* code required outdated VHDCI adapter 1.0
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2018-07-17 17:48:57 +08:00 |
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13984385a8
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firmware: version → ident
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2018-07-15 17:40:17 +08:00 |
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b2695d03ed
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sayma: remove with_sawg from Master variant
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2018-07-15 17:38:29 +08:00 |
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123e7bc054
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pyon: sort string dicts by key when pretty-printing. Closes #1010
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2018-07-15 17:38:09 +08:00 |
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b27fa8964b
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add variant in identifier string
Also add without-sawg suffixes on Sayma.
Closes #1060
Closes #1059
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2018-07-15 17:21:17 +08:00 |
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b6c70b3cb0
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eem: add Zotino monitoring. Closes #1095
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2018-07-15 15:35:04 +08:00 |
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8bcba82b65
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grabber: reset *_good signals on end of frame
This reduces the amount of time the ROI engine produces invalid output after
being reconfigured.
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2018-07-15 15:34:00 +08:00 |
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ea7f925852
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Revert "worker_db: Only warn on repeated archive read if dataset changed"
Breaks numpy arrays.
This reverts commit 141fcaaa8a.
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2018-07-13 10:41:06 +08:00 |
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46fb5adac3
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grabber: fix frequency counter formula
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2018-07-12 20:14:38 +08:00 |
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82def6b535
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grabber: add frequency counter
Cameras are a bit obscure about what they output, this can help with troubleshooting.
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2018-07-12 17:05:18 +08:00 |
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29c35ee553
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hmc7043: fix dumb mistake in previous commit
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2018-07-12 13:01:41 +08:00 |
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8802b930de
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hmc7043: add delay after init
Delay required at step 9 of the "Typical Programming Sequence" (page 24 of the datasheet)
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2018-07-12 12:37:12 +08:00 |
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c66f9483f8
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hmc7043: wait after changing delays
Allows for the SPI transaction to finish, and for the delay to stabilize.
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2018-07-12 12:33:53 +08:00 |
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