whitequark
9df7932169
firmware: add a Cargo workspace.
...
The Rust editor plugin for Sublime Text tries to invoke cargo,
which disregards our Makefile and places junk all around the source
tree. This calms it down, and now it only does that where our
.gitignore already handles it.
2016-12-26 17:20:29 +00:00
whitequark
c45a170bb4
firmware: update for Rust 1.16.0.
2016-12-26 17:20:29 +00:00
f5f662200b
fir: streamline, optimize DSP extraction, left-align inputs
2016-12-20 21:39:51 +01:00
cfb66117af
fir: size hint for pre-adder
2016-12-20 17:58:06 +01:00
f310274e39
fir: cleanup halfgen4
2016-12-20 17:58:06 +01:00
whitequark
5f3033b518
firmware: remove max_level_debug.
...
Tracing to the core log isn't particularly slow, and is handy
when debugging.
2016-12-19 13:24:29 +00:00
whitequark
739da9f1b3
runtime: print trace level log messages to UART during startup.
...
There's no way to retrieve them otherwise if the startup kernel
hangs.
This commit was mistakenly removed in 88ad054
2016-12-19 13:21:21 +00:00
whitequark
b9588ddf03
firmware: don't crash on artiq_compile'd kernels ( fixes #641 ).
2016-12-19 13:01:18 +00:00
68b2373b9a
korad_ka3005p: fix simulation mode
2016-12-19 09:49:44 +01:00
161025e7df
korad_ka3005p: use ProactorEventLoop on windows
2016-12-19 09:33:20 +01:00
d55f2bda86
korad_ka3005p: cleanup
2016-12-19 09:32:21 +01:00
jboulder
baac555f96
add device for Korad KA3005P programmable DC power supply
2016-12-19 09:31:21 +01:00
db5957a7e7
firmware: use bsp crate in ad9154
2016-12-17 11:43:29 +08:00
9a564e07c0
firmware: make libbsp a crate
2016-12-16 21:28:25 +08:00
c99388f80f
firmware: use M-Labs as author in Cargo.toml files
2016-12-16 20:14:11 +08:00
9967dfc5ca
runtime: reorganize to support DRTIO satellite firmware
2016-12-16 19:11:19 +08:00
6b998581cc
rtio: use same reset for counter_rtio whatever the interface delay is
2016-12-15 09:28:13 +08:00
15b48be6e4
test/sawg: adapt to new latency spec
2016-12-14 19:43:30 +01:00
115ea67860
fir: automatically use transposed topology
2016-12-14 19:16:07 +01:00
a451b675c9
Revert "fir: different adder layout"
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This reverts commit 6f50e77b409c293c1905f28e69d79403a0803866.
2016-12-14 19:16:07 +01:00
93076b8efa
fir: different adder layout
2016-12-14 19:16:07 +01:00
61abd994e9
Revert "fir: force dsp48"
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This reverts commit 0ad433832d1b6dcd803ffa086ae73b2ee0568326.
2016-12-14 19:16:07 +01:00
641d109786
fir: force dsp48
2016-12-14 19:16:07 +01:00
8381db279f
sawg: wire up all HBF outputs, latency compensation in phys, simplify
2016-12-14 19:16:07 +01:00
6cdb96c5e0
rtio: add support for latency compensation in phy
...
* if multiple RTIO channels influence the same data stream and physical
output channel (see SAWG) differential latency needs to be compensated
* this is a NOP for phys with zero delay (default)
* if delay==1, it adds one timestamp-wide register
* if delay >1, it adds one adder and one register
* latency compensation using (~10-50 deep) delay lines is about as
expensive as a single adder+register but very tedious to implement
2016-12-14 19:16:07 +01:00
7be27d7116
fir: add upsample transfer function test
2016-12-14 19:16:07 +01:00
4c27029be0
sawg: fix limit regs
2016-12-14 19:16:07 +01:00
708c25b83a
phaser: don't init rtio in startup_kernel
2016-12-14 19:16:07 +01:00
e9592105ce
drtio: fix aux controller clock domain mistakes
2016-12-14 10:16:45 +08:00
527757b471
kc705_drtio: use ad9154_fmc_ebz
2016-12-13 14:30:26 +08:00
3b5abae935
drtio: fix clock domain conflict
2016-12-13 14:19:49 +08:00
03d13d3811
phaser: dma/drtio changes
2016-12-12 17:46:36 +01:00
c63fa46430
Merge branch 'phaser2'
...
* phaser2: (157 commits)
sawg/hbf: tweak pipeline for timing
fir: register multiplier output
conda/phaser: build-depend on numpy
sawg: reduce coefficient width
sawg: fix latency
test/fir: needs mpl. don't run by default
test/sawg: patch spline
sawg: use ParallelHBFCascade to AA [WIP]
fir: add ParallelHBFCascade
fir: add ParallelFIR and test
gateware/dsp: add FIR and test
README_PHASER: update
sawg: documentation
sawg: extract spline
sawg: document
sawg: demo_2tone
sawg: round to int64
gateware/phaser -> gateware/ad9154_fmc_ebz
phaser: fix typo
sawg: merge set/set64
...
2016-12-12 17:31:39 +01:00
4b61020b27
drtio: reset more local state
2016-12-12 18:48:10 +08:00
d99e64effd
drtio: clear any stale FIFO space reply
2016-12-12 18:02:56 +08:00
4c59c0fecf
Revert "drtio: order resets wrt writes"
...
This reverts commit 9a048c2b3a
2016-12-12 17:49:07 +08:00
6a60afcba0
runtime: clear all DRTIO FIFOs first, reset remote PHYs on link init
2016-12-12 17:48:25 +08:00
8f747fa209
drtio: clear underflow and sequence error on reset
2016-12-12 17:39:14 +08:00
7196bc21c1
rtio: simplify error reset logic
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Channel is always selected when reset is issued.
2016-12-12 17:35:10 +08:00
1c74249638
runtime: reset local DRTIO state
2016-12-12 17:30:41 +08:00
9a048c2b3a
drtio: order resets wrt writes
2016-12-12 17:18:07 +08:00
ac792ec52b
RELEASE_NOTES: 2.1
2016-12-12 13:12:18 +08:00
cbc49ea91d
set asyncio loop earlier in controllers ( #627 )
2016-12-12 11:38:02 +08:00
3743633b04
Revert "pc_rpc: use ProactorEventLoop on Windows ( #627 )"
...
This reverts commit 7d4297b9bb
2016-12-12 11:33:56 +08:00
09fb4869f3
runtime: centralize (D)RTIO management
2016-12-09 19:24:00 +08:00
0a9f69a3ed
kc705_drtio_master: add missing rtio_core CSRs
2016-12-09 19:23:36 +08:00
4422b6902a
runtime: silence unused variable warnings
2016-12-09 19:23:06 +08:00
bc36bda94a
perform RTIO init on comms CPU side
2016-12-09 14:16:55 +08:00
5accb7a0ac
manual: add missing quote
2016-12-09 14:16:32 +08:00
f6071a5812
sawg/hbf: tweak pipeline for timing
2016-12-08 17:00:53 +01:00
