Sebastien Bourdeauducq
|
446f791180
|
firmware: simplify SYSREF DRTIO alignment
|
2018-07-26 19:37:59 +08:00 |
Sebastien Bourdeauducq
|
f8c17528e7
|
satman: use new SYSREF code
|
2018-07-26 16:26:57 +08:00 |
Sebastien Bourdeauducq
|
32c95ac034
|
sayma: automated DAC SYSREF phase calibration
|
2018-07-26 16:23:55 +08:00 |
Sebastien Bourdeauducq
|
dbcf2fe9b4
|
firmware: remove 'chip found' messages on Sayma
|
2018-07-26 16:07:37 +08:00 |
Sebastien Bourdeauducq
|
d523d03f71
|
sayma: automated FPGA SYSREF phase offset calibration
|
2018-07-26 14:53:28 +08:00 |
Sebastien Bourdeauducq
|
0a9d3638ee
|
config: add write_int
|
2018-07-26 14:49:32 +08:00 |
Sebastien Bourdeauducq
|
19c51c644e
|
grabber: cleanup GRABBER_STATE
|
2018-07-24 19:08:51 +08:00 |
Sebastien Bourdeauducq
|
fb96c1140e
|
grabber: add coredevice driver
|
2018-07-24 18:06:44 +08:00 |
Sebastien Bourdeauducq
|
b38c685857
|
grabber: fix pix.stb
|
2018-07-24 11:32:32 +08:00 |
Sebastien Bourdeauducq
|
60a7e0e40d
|
grabber: use usual order of ROI coordinates in cfg addresses
|
2018-07-24 10:55:13 +08:00 |
Sebastien Bourdeauducq
|
015c592ab7
|
conda: bump jesd204b
|
2018-07-21 15:49:40 +08:00 |
Sebastien Bourdeauducq
|
7b75026391
|
grabber: add MultiReg to transfer ROI boundaries
|
2018-07-21 13:40:12 +08:00 |
Sebastien Bourdeauducq
|
4a4d0f8e51
|
grabber: fix missing variable rename
|
2018-07-21 13:39:46 +08:00 |
Sebastien Bourdeauducq
|
3638a966e1
|
kasli: add false path between RTIO and CL clocks
|
2018-07-21 13:26:13 +08:00 |
Sebastien Bourdeauducq
|
031de58d21
|
grabber: complete RTIO PHY, untested
|
2018-07-21 13:25:47 +08:00 |
Sebastien Bourdeauducq
|
e3ba4b9516
|
grabber: minor ROI engine cleanup, export count_len, cap count width to 31
|
2018-07-21 13:25:13 +08:00 |
Sebastien Bourdeauducq
|
766d87f626
|
doc: artiq_coreconfig → artiq_coremgmt config. Closes #1111
|
2018-07-20 11:59:07 +08:00 |
Sebastien Bourdeauducq
|
cab0ba408d
|
fmcdio_vhdci_eem: cleanup and document
|
2018-07-20 09:57:03 +08:00 |
Sebastien Bourdeauducq
|
d152506ecb
|
sayma: update fmcdio_vhdci_eem demo
|
2018-07-19 15:47:20 +08:00 |
Sebastien Bourdeauducq
|
8dfcd463aa
|
fmcdio_vhdci_eem: naming consistency
|
2018-07-19 15:46:04 +08:00 |
Sebastien Bourdeauducq
|
fe93a454d6
|
fmcdio_vhdci_eem: fix direction shift register permutation and polarity
|
2018-07-19 15:16:21 +08:00 |
Sebastien Bourdeauducq
|
e71cbe53a6
|
firmware: cleanup Cargo.lock
|
2018-07-18 10:37:43 +08:00 |
Sebastien Bourdeauducq
|
31f4f8792a
|
sayma: add Urukul and Zotino to example device_db
|
2018-07-18 10:31:55 +08:00 |
Sebastien Bourdeauducq
|
25170a53e5
|
sayma: add back Urukul and Zotino
|
2018-07-18 10:27:54 +08:00 |
Sebastien Bourdeauducq
|
5e62910a8d
|
examples: add Sayma VHDCI DIO
|
2018-07-17 23:28:05 +08:00 |
Sebastien Bourdeauducq
|
8b9a8be12a
|
fmcdio_vhdci_eem: add dirctl word computation functions
|
2018-07-17 23:27:29 +08:00 |
Sebastien Bourdeauducq
|
82145b1263
|
examples: sayma_drtio → sayma_masterdac
|
2018-07-17 20:32:30 +08:00 |
Sebastien Bourdeauducq
|
c7d96c2223
|
conda: bump migen
|
2018-07-17 20:30:23 +08:00 |
Sebastien Bourdeauducq
|
7fe76426fe
|
fmcdio_vhdci_eem: commit missing part of previous commit
|
2018-07-17 20:30:13 +08:00 |
Sebastien Bourdeauducq
|
d4d12e264d
|
fmcdio_vhdci_eem: refactor
This allows access to the pin allocation from kernels, which becomes useful
to configure the direction shift register.
|
2018-07-17 20:13:59 +08:00 |
Sebastien Bourdeauducq
|
4fdc20bb11
|
sayma: disable Urukul and Zotino for now
Ultrascale I/Os are being a pain as usual and the SPI core won't compile.
|
2018-07-17 20:08:21 +08:00 |
Sebastien Bourdeauducq
|
8335085fd6
|
fmcdio_vhdci_eem: fix cc pins
|
2018-07-17 19:50:34 +08:00 |
Sebastien Bourdeauducq
|
8f7c0c1646
|
fmcdio_vhdci_eem: fix iostandard
|
2018-07-17 19:40:34 +08:00 |
Sebastien Bourdeauducq
|
d724bd980c
|
sayma: add EEMs to Master
|
2018-07-17 18:58:23 +08:00 |
Sebastien Bourdeauducq
|
a0f2d8c2ea
|
gateware: add FMCDIO/EEM adapter definitions
|
2018-07-17 18:58:16 +08:00 |
Sebastien Bourdeauducq
|
3645a6424e
|
sayma: fix Master build
|
2018-07-17 18:56:33 +08:00 |
Sebastien Bourdeauducq
|
9b016dcd6d
|
eem: support specifying I/O standard
Xilinx FPGAs require different LVDS I/O standard names depending on I/O bank voltage.
|
2018-07-17 18:55:17 +08:00 |
Sebastien Bourdeauducq
|
3168b193e6
|
kc705: remove Zotino and Urukul
* use Kasli instead for using EEMs
* code required outdated VHDCI adapter 1.0
|
2018-07-17 17:48:57 +08:00 |
Sebastien Bourdeauducq
|
13984385a8
|
firmware: version → ident
|
2018-07-15 17:40:17 +08:00 |
Sebastien Bourdeauducq
|
b2695d03ed
|
sayma: remove with_sawg from Master variant
|
2018-07-15 17:38:29 +08:00 |
Sebastien Bourdeauducq
|
123e7bc054
|
pyon: sort string dicts by key when pretty-printing. Closes #1010
|
2018-07-15 17:38:09 +08:00 |
Sebastien Bourdeauducq
|
b27fa8964b
|
add variant in identifier string
Also add without-sawg suffixes on Sayma.
Closes #1060
Closes #1059
|
2018-07-15 17:21:17 +08:00 |
Sebastien Bourdeauducq
|
b6c70b3cb0
|
eem: add Zotino monitoring. Closes #1095
|
2018-07-15 15:35:04 +08:00 |
Sebastien Bourdeauducq
|
8bcba82b65
|
grabber: reset *_good signals on end of frame
This reduces the amount of time the ROI engine produces invalid output after
being reconfigured.
|
2018-07-15 15:34:00 +08:00 |
Sebastien Bourdeauducq
|
ea7f925852
|
Revert "worker_db: Only warn on repeated archive read if dataset changed"
Breaks numpy arrays.
This reverts commit 141fcaaa8a .
|
2018-07-13 10:41:06 +08:00 |
Sebastien Bourdeauducq
|
46fb5adac3
|
grabber: fix frequency counter formula
|
2018-07-12 20:14:38 +08:00 |
Sebastien Bourdeauducq
|
82def6b535
|
grabber: add frequency counter
Cameras are a bit obscure about what they output, this can help with troubleshooting.
|
2018-07-12 17:05:18 +08:00 |
Sebastien Bourdeauducq
|
29c35ee553
|
hmc7043: fix dumb mistake in previous commit
|
2018-07-12 13:01:41 +08:00 |
Sebastien Bourdeauducq
|
8802b930de
|
hmc7043: add delay after init
Delay required at step 9 of the "Typical Programming Sequence" (page 24 of the datasheet)
|
2018-07-12 12:37:12 +08:00 |
Sebastien Bourdeauducq
|
c66f9483f8
|
hmc7043: wait after changing delays
Allows for the SPI transaction to finish, and for the delay to stabilize.
|
2018-07-12 12:33:53 +08:00 |