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00f42f912b
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rename 'RTM identifier' to 'RTM magic number'
Avoids confusion with the MiSoC identifier (containing the ARTIQ version).
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2018-02-13 20:02:51 +08:00 |
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96b948f57f
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remote_csr: add sanity check of CSR CSV type column
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2018-02-13 20:02:51 +08:00 |
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e67a289e2b
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examples: add SAWG sines (DAC synchronization test)
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2018-02-13 20:02:51 +08:00 |
|
Florent Kermarrec
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bfdda340fd
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drtio/transceiver/gtp_7series: use parameters from xilinx wizard
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2018-02-13 00:23:59 +01:00 |
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Florent Kermarrec
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180c28551d
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drtio/gateware/transceiver/gtp_7series: add power down state before reset on rx (seems to make restart reliable)
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2018-02-09 20:17:02 +01:00 |
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2d4a1340ea
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sayma_amc: remove RTM bitstream upload core. Closes #908
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2018-02-07 12:27:35 +08:00 |
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whitequark
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61c64a76be
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gateware: use a per-variant subfolder in --output-dir. (fixes #912)
This commit also adds support for --variant and --args
to artiq-devtool.
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2018-02-06 08:19:01 +00:00 |
|
Florent Kermarrec
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e80b481032
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firmware/libboard_artiq/hmc830_7043.rs: add template for sys_ref phase configuration for dac1/dac2 and fpga
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2018-02-05 13:40:17 +01:00 |
|
Florent Kermarrec
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e50bebb63d
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firmware/liboard_artiq/ad9154.rs: add checks for jesd subclass 1 (verify that we receive the sysref and that phase error is within the specified window error threshold).
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2018-02-05 13:39:30 +01:00 |
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4c22d64ee4
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conda: sync artiq/artiq-dev dependencies
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2018-01-30 08:36:55 +01:00 |
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9fca7b8faa
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artiq_flash: also report sayma AMC SYSMONE1 data
requires hardware patch (https://github.com/m-labs/sinara/issues/495)
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2018-01-30 15:17:11 +08:00 |
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fb8c779b4f
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artiq_flash: report XADC data
* bump openocd
* only kasli, kc705, sayma rtm so far
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2018-01-30 14:56:50 +08:00 |
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whitequark
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807eb1155b
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Update smoltcp.
Fixes #902.
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2018-01-30 03:29:08 +00:00 |
|
whitequark
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a669652854
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artiq_flash: tell openocd to not listen on any network ports.
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2018-01-30 03:12:06 +00:00 |
|
whitequark
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0edc34a9e5
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artiq_devtool: the proxy artiq_flash action doesn't exist anymore.
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2018-01-28 15:19:17 +00:00 |
|
whitequark
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9a94482c6e
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conda: fix typo in 885ab409.
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2018-01-28 15:18:52 +00:00 |
|
whitequark
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79ea454ec1
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conda: use $SP_DIR instead of $PREFIX/lib/python3.5/site-packages. (#652)
This removes the last hardcoded python3.5 reference.
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2018-01-28 14:29:19 +00:00 |
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whitequark
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885ab40946
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conda: split RTM and AMC packages back.
This avoids multiplying the RTM compilation time by the number
of AMC packages.
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2018-01-28 14:27:55 +00:00 |
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whitequark
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11a8b84355
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Merge the build trees of sayma_amc and sayma_rtm targets.
This also makes them a single artiq_flash target, and a single
conda package.
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2018-01-27 19:54:31 +00:00 |
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whitequark
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0b9c551962
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artiq_flash: implement flash read functionality.
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2018-01-27 19:54:31 +00:00 |
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0aacdb0458
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tools: add missing import
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2018-01-28 02:12:46 +08:00 |
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6f90a43df2
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examples: reorganize for new hardware
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2018-01-28 02:11:45 +08:00 |
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67625fe912
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test: check kernel overhead credibility
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2018-01-28 01:02:03 +08:00 |
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e8ed3475ea
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test: add kernel overhead test (#407)
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2018-01-28 01:00:59 +08:00 |
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3231d8b235
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RELEASE_NOTES: 3.3
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2018-01-28 00:18:01 +08:00 |
|
whitequark
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eed2db3a98
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artiq_flash: make the proxy action unnecessary.
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2018-01-27 15:43:27 +00:00 |
|
whitequark
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d58393a1e5
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runtime: build with -Cpanic=unwind.
This is required for backtraces to function. I'm not sure how it
turned out that master had -Cpanic=abort.
|
2018-01-26 23:01:24 +00:00 |
|
whitequark
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08101b631d
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artiq_devtool: fix typo.
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2018-01-26 13:55:31 +00:00 |
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440e19b8f9
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kasli: use SFP2 for DRTIO mastering
SFP1 PCB routing has some issues.
Also use SFP1 LED for DRTIO in both master and satellite.
|
2018-01-26 19:02:54 +08:00 |
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c9b36e3559
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conda: bump misoc, close #905
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2018-01-25 19:31:26 +01:00 |
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0d2f89db53
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si5324: chip does not ack RST_REG write
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2018-01-25 11:06:19 +08:00 |
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ca4d5ae73e
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artiq_flash: add kasli drtio variants
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2018-01-25 00:00:07 +08:00 |
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77f90cf93b
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test: relax RTIO counter test and print result
|
2018-01-24 10:07:22 +08:00 |
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ed0fbd5662
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test: add test for RTIO counter (#883)
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2018-01-24 00:28:39 +08:00 |
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e0e795f11c
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sayma_amc: constrain pin, remove keep
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2018-01-23 15:42:47 +00:00 |
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ee14912042
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conda: bump migen/misoc (vivado constraints)
|
2018-01-23 16:23:12 +01:00 |
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b5c035bb52
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sayma_rtm: constrain serwb clock input
|
2018-01-23 13:54:53 +00:00 |
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aada38f508
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kasli, kc705: remove vivado "keep", cleanup a constraint
|
2018-01-23 13:15:26 +00:00 |
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85102e191e
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sayma_rtm: derive clocks automatically
* also don't add false paths unless necessary
|
2018-01-23 11:00:55 +00:00 |
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7d1b3f37c9
|
sayma_rtm: set CFGBVS/CONFIG_VOLTAGE, compress
|
2018-01-23 10:56:42 +00:00 |
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cb0016ceee
|
examples/sayma: fix ref_multiplier
SAWG is working, whoohoo!
|
2018-01-23 15:26:03 +08:00 |
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cfffd9e13d
|
si5324: kasli support
|
2018-01-23 13:17:03 +08:00 |
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649deccd9b
|
kasli: fix DRTIO satellite QPLL refclksel
|
2018-01-23 12:27:19 +08:00 |
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4b4374f76a
|
sayma: register_jref for JESD204. Closes #904
|
2018-01-23 12:19:15 +08:00 |
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763aefacff
|
kasli: fix typo
|
2018-01-23 12:10:54 +08:00 |
|
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c7b148a704
|
kasli: when using both GTP clocks, send REFCLK0 to PLL0 and REFCLK1 to PLL1
|
2018-01-23 12:08:10 +08:00 |
|
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d6157514c7
|
gtp_7series: flexible QPLL channel selection
|
2018-01-23 12:03:09 +08:00 |
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9f87c34a94
|
kasli: fix QPLL instantiation
|
2018-01-23 10:39:31 +08:00 |
|
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|
98a5607634
|
gtp_7series: set clock muxes correctly for second QPLL channel
|
2018-01-23 10:39:20 +08:00 |
|
|
|
25fee1a0bb
|
gtp_7series: use QPLL second channel
|
2018-01-23 10:15:49 +08:00 |
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