forked from M-Labs/artiq
sayma: register_jref for JESD204. Closes #904
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@ -98,7 +98,7 @@ class AD9154JESD(Module, AutoCSR):
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phys, settings, converter_data_width=64))
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self.submodules.control = control = to_jesd(JESD204BCoreTXControl(core))
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core.register_jsync(platform.request("dac_sync", dac))
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#core.register_jref(jesd_crg.jref) # FIXME: uncomment on next jesd204b update
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core.register_jref(jesd_crg.jref)
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class AD9154(Module, AutoCSR):
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