forked from M-Labs/artiq
artiq_flash: report XADC data
* bump openocd * only kasli, kc705, sayma rtm so far
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@ -109,7 +109,7 @@ class Programmer:
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"telnet_port disabled"
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] + preinit_script
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self._loaded = defaultdict(lambda: None)
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self._script = []
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self._script = ["init"]
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def _transfer_script(self, script):
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if isinstance(self._client, LocalClient):
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@ -174,7 +174,6 @@ class Programmer:
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return [
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*self._board_script,
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*self._preinit_script,
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"init",
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*self._script,
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"exit"
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]
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@ -204,6 +203,8 @@ class ProgrammerXC7(Programmer):
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boardfile=self._transfer_script("board/{}.cfg".format(board)))
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self.add_flash_bank("spi0", "xc7", index=0)
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add_commands(self._script, "xadc_report xc7.tap")
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def load_proxy(self):
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self.load(find_proxy_bitfile(self._proxy), pld=0)
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@ -219,6 +220,8 @@ class ProgrammerSayma(Programmer):
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Programmer.__init__(self, client, preinit_script)
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add_commands(self._board_script,
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"source {}".format(self._transfer_script("fpga/xilinx-xadc.cfg")),
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"interface ftdi",
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"ftdi_device_desc \"Quad RS232-HS\"",
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"ftdi_vid_pid 0x0403 0x6011",
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@ -237,12 +240,13 @@ class ProgrammerSayma(Programmer):
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self.add_flash_bank("spi0", "xcu", index=0)
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self.add_flash_bank("spi1", "xcu", index=1)
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add_commands(self._script, "echo \"RTM FPGA XADC:\"", "xadc_report xc7.tap")
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def load_proxy(self):
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self.load(find_proxy_bitfile("bscan_spi_xcku040-sayma.bit"), pld=1)
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def start(self):
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add_commands(self._script,
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"xcu_program xcu.tap")
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add_commands(self._script, "xcu_program xcu.tap")
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def main():
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@ -22,7 +22,7 @@ requirements:
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- llvm-or1k 4.0.1
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- llvmlite-artiq 0.20.0
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- rust-core-or1k 1.23.0 19
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- openocd 0.10.0+git2
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- openocd 0.10.0 4
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- lit
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- outputcheck
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- coverage
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