forked from M-Labs/artiq
rename 'RTM identifier' to 'RTM magic number'
Avoids confusion with the MiSoC identifier (containing the ARTIQ version).
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parent
96b948f57f
commit
00f42f912b
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@ -38,12 +38,12 @@ pub fn wait_init() {
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}
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info!("done.");
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// Try reading the identifier register on the other side of the bridge.
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let rtm_identifier = unsafe {
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csr::rtm_identifier::identifier_read()
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// Try reading the magic number register on the other side of the bridge.
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let rtm_magic = unsafe {
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csr::rtm_magic::magic_read()
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};
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if rtm_identifier != 0x5352544d {
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error!("incorrect RTM identifier: 0x{:08x}", rtm_identifier);
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if rtm_magic != 0x5352544d {
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error!("incorrect RTM magic number: 0x{:08x}", rtm_magic);
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// proceed anyway
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}
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@ -61,10 +61,10 @@ class CRG(Module):
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self.specials += Instance("IDELAYCTRL", i_REFCLK=ClockSignal("clk200"), i_RST=ic_reset)
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class RTMIdentifier(Module, AutoCSR):
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class RTMMagic(Module, AutoCSR):
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def __init__(self):
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self.identifier = CSRStatus(32)
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self.comb += self.identifier.status.eq(0x5352544d) # "SRTM"
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self.magic = CSRStatus(32)
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self.comb += self.magic.status.eq(0x5352544d) # "SRTM"
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CSR_RANGE_SIZE = 0x800
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@ -83,8 +83,8 @@ class SaymaRTM(Module):
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self.submodules.crg = CRG(platform)
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clk_freq = 125e6
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self.submodules.rtm_identifier = RTMIdentifier()
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csr_devices.append("rtm_identifier")
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self.submodules.rtm_magic = RTMMagic()
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csr_devices.append("rtm_magic")
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# clock mux: 100MHz ext SMA clock to HMC830 input
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self.submodules.clock_mux = gpio.GPIOOut(Cat(
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